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Wed, 24 Jan 2024 18:27:23 -0800 (PST) X-Google-Smtp-Source: AGHT+IFhVwQPv45Nmak+PDpiW69uGMalWXO+wW5roa0w7KcVhxcsRTKqrmaDNmbXzGB0JHZQcwdlUg== X-Received: by 2002:a17:903:32cd:b0:1d7:1c67:3f7c with SMTP id i13-20020a17090332cd00b001d71c673f7cmr211085plr.92.1706149643638; Wed, 24 Jan 2024 18:27:23 -0800 (PST) Received: from [10.72.112.202] ([43.228.180.230]) by smtp.gmail.com with ESMTPSA id v1-20020a170902b7c100b001d75db0ae21sm4696611plz.170.2024.01.24.18.27.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 24 Jan 2024 18:27:23 -0800 (PST) Message-ID: Date: Thu, 25 Jan 2024 12:27:20 +1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/5] hw/arm/aspeed: Introduce aspeed_soc_cpu_type() helper Content-Language: en-US To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: Peter Maydell , qemu-arm@nongnu.org, Joel Stanley , Andrew Jeffery , =?UTF-8?Q?C=C3=A9dric_Le_Goater?= References: <20240123224842.18485-1-philmd@linaro.org> <20240123224842.18485-5-philmd@linaro.org> From: Gavin Shan In-Reply-To: <20240123224842.18485-5-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.5, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_SORBS_WEB=1.5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/24/24 08:48, Philippe Mathieu-Daudé wrote: > In order to alter AspeedSoCClass::cpu_type in the next > commit, introduce the aspeed_soc_cpu_type() helper to > retrieve the per-SoC CPU type from AspeedSoCClass. > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/hw/arm/aspeed_soc.h | 1 + > hw/arm/aspeed_ast10x0.c | 2 +- > hw/arm/aspeed_ast2400.c | 3 ++- > hw/arm/aspeed_ast2600.c | 3 ++- > hw/arm/aspeed_soc_common.c | 5 +++++ > 5 files changed, 11 insertions(+), 3 deletions(-) > Reviewed-by: Gavin Shan