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([2a01:e0a:59e:9d80:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id t7-20020a05620a034700b007651047d620sm3873542qkm.125.2023.06.27.05.24.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Jun 2023 05:24:21 -0700 (PDT) Message-ID: Date: Tue, 27 Jun 2023 14:24:18 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH v3] target/arm: Add raw_writes ops for register whose write induce TLB maintenance Content-Language: en-US To: Peter Maydell Cc: eric.auger.pro@gmail.com, richard.henderson@linaro.org, pbonzini@redhat.com, qemu-devel@nongnu.org, philmd@linaro.org References: <20230228093619.342575-1-eric.auger@redhat.com> <27fd657b-02e7-658c-4cc4-07a6c374a1b9@redhat.com> From: Eric Auger In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.103, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Peter, On 6/27/23 14:23, Peter Maydell wrote: > On Fri, 23 Jun 2023 at 17:43, Eric Auger wrote: >> Hi Peter, >> >> On 2/28/23 10:36, Eric Auger wrote: >>> Some registers whose 'cooked' writefns induce TLB maintenance do >>> not have raw_writefn ops defined. If only the writefn ops is set >>> (ie. no raw_writefn is provided), it is assumed the cooked also >>> work as the raw one. For those registers it is not obvious the >>> tlb_flush works on KVM mode so better/safer setting the raw write. >>> >>> Signed-off-by: Eric Auger >>> Suggested-by: Peter Maydell >> If I am not wrong this patch fell into the cracks. Is it in a decent >> state now? > Oops, sorry about that. Yes, I think v3 looks good; I've > applied it to target-arm.next. no problem. thanks! Eric > > thanks > -- PMM >