Re: [PATCH 2/3] target/arm: Correct STRD atomicity

[Richard Henderson <richard.henderson@linaro.org>]

On 2/27/25 06:27, Peter Maydell wrote:
> Our STRD implementation doesn't correctly implement the requirement:
>   * if the address is 8-aligned the access must be a 64-bit
>     single-copy atomic access, not two 32-bit accesses
> 
> Rewrite the handling of STRD to use a single tcg_gen_qemu_st_i64()
> of a value produced by concatenating the two 32 bit source registers.
> This allows us to get the atomicity right.
> 
> As with the LDRD change, now that we don't update 'addr' in the
> course of performing the store we need to adjust the offset
> we pass to op_addr_ri_post() and op_addr_rr_post().
> 
> Cc:qemu-stable@nongnu.org
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
>   target/arm/tcg/translate.c | 55 ++++++++++++++++++++++++--------------
>   1 file changed, 35 insertions(+), 20 deletions(-)

Modulo the LPAE comment vs patch 1,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~