From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
"Markus Armbruster" <armbru@redhat.com>,
"Huang, Ying" <ying.huang@intel.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Ani Sinha" <anisinha@redhat.com>,
"Shannon Zhao" <shannon.zhaosl@gmail.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Eric Blake" <eblake@redhat.com>,
"Daniel P. Berrangé" <berrange@redhat.com>,
qemu-arm@nongnu.org
Subject: [PULL 12/65] hw/acpi: Generic Port Affinity Structure support
Date: Mon, 4 Nov 2024 16:06:16 -0500 [thread overview]
Message-ID: <a82fe82916432091ca6fcbd7f357cccf35f6e80d.1730754238.git.mst@redhat.com> (raw)
In-Reply-To: <cover.1730754238.git.mst@redhat.com>
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
These are very similar to the recently added Generic Initiators
but instead of representing an initiator of memory traffic they
represent an edge point beyond which may lie either targets or
initiators. Here we add these ports such that they may
be targets of hmat_lb records to describe the latency and
bandwidth from host side initiators to the port. A discoverable
mechanism such as UEFI CDAT read from CXL devices and switches
is used to discover the remainder of the path, and the OS can build
up full latency and bandwidth numbers as need for work and data
placement decisions.
Acked-by: Markus Armbruster <armbru@redhat.com>
Tested-by: "Huang, Ying" <ying.huang@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20240916174122.1843197-1-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
qapi/qom.json | 41 ++++++++++
include/hw/acpi/aml-build.h | 3 +
include/hw/acpi/pci.h | 2 +-
include/hw/pci/pci_bridge.h | 1 +
hw/acpi/aml-build.c | 39 ++++++++++
hw/acpi/pci.c | 116 +++++++++++++++++++++++++++-
hw/arm/virt-acpi-build.c | 2 +-
hw/i386/acpi-build.c | 2 +-
hw/pci-bridge/pci_expander_bridge.c | 1 -
9 files changed, 202 insertions(+), 5 deletions(-)
diff --git a/qapi/qom.json b/qapi/qom.json
index 321ccd708a..a8beeabf1f 100644
--- a/qapi/qom.json
+++ b/qapi/qom.json
@@ -844,6 +844,45 @@
'data': { 'pci-dev': 'str',
'node': 'uint32' } }
+##
+# @AcpiGenericPortProperties:
+#
+# Properties for acpi-generic-port objects.
+#
+# @pci-bus: QOM path of the PCI bus of the hostbridge associated with
+# this SRAT Generic Port Affinity Structure. This is the same as
+# the bus parameter for the root ports attached to this host
+# bridge. The resulting SRAT Generic Port Affinity Structure will
+# refer to the ACPI object in DSDT that represents the host bridge
+# (e.g. ACPI0016 for CXL host bridges). See ACPI 6.5 Section
+# 5.2.16.7 for more information.
+#
+# @node: Similar to a NUMA node ID, but instead of providing a
+# reference point used for defining NUMA distances and access
+# characteristics to memory or from an initiator (e.g. CPU), this
+# node defines the boundary point between non-discoverable system
+# buses which must be described by firmware, and a discoverable
+# bus. NUMA distances and access characteristics are defined to
+# and from that point. For system software to establish full
+# initiator to target characteristics this information must be
+# combined with information retrieved from the discoverable part
+# of the path. An example would use CDAT (see UEFI.org)
+# information read from devices and switches in conjunction with
+# link characteristics read from PCIe Configuration space.
+# To get the full path latency from CPU to CXL attached DRAM
+# CXL device: Add the latency from CPU to Generic Port (from
+# HMAT indexed via the the node ID in this SRAT structure) to
+# that for CXL bus links, the latency across intermediate switches
+# and from the EP port to the actual memory. Bandwidth is more
+# complex as there may be interleaving across multiple devices
+# and shared links in the path.
+#
+# Since: 9.1
+##
+{ 'struct': 'AcpiGenericPortProperties',
+ 'data': { 'pci-bus': 'str',
+ 'node': 'uint32' } }
+
##
# @RngProperties:
#
@@ -1043,6 +1082,7 @@
{ 'enum': 'ObjectType',
'data': [
'acpi-generic-initiator',
+ 'acpi-generic-port',
'authz-list',
'authz-listfile',
'authz-pam',
@@ -1118,6 +1158,7 @@
'discriminator': 'qom-type',
'data': {
'acpi-generic-initiator': 'AcpiGenericInitiatorProperties',
+ 'acpi-generic-port': 'AcpiGenericPortProperties',
'authz-list': 'AuthZListProperties',
'authz-listfile': 'AuthZListFileProperties',
'authz-pam': 'AuthZPAMProperties',
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index 33eef85791..47a4692a7d 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -490,6 +490,9 @@ void build_srat_pci_generic_initiator(GArray *table_data, int node,
uint16_t segment, uint8_t bus,
uint8_t devfn);
+void build_srat_acpi_generic_port(GArray *table_data, uint32_t node,
+ const char *hid, uint32_t uid);
+
void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms,
const char *oem_id, const char *oem_table_id);
diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
index 3015a8171c..6359d574fd 100644
--- a/include/hw/acpi/pci.h
+++ b/include/hw/acpi/pci.h
@@ -41,6 +41,6 @@ Aml *aml_pci_device_dsm(void);
void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
-void build_srat_generic_pci_initiator(GArray *table_data);
+void build_srat_generic_affinity_structures(GArray *table_data);
#endif
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index 5cd452115a..5456e24883 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
@@ -102,6 +102,7 @@ typedef struct PXBPCIEDev {
PXBDev parent_obj;
} PXBPCIEDev;
+#define TYPE_PXB_CXL_BUS "pxb-cxl-bus"
#define TYPE_PXB_DEV "pxb"
OBJECT_DECLARE_SIMPLE_TYPE(PXBDev, PXB_DEV)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index aeb4cb94e8..7a06ffec5a 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -1954,6 +1954,19 @@ static void build_append_srat_pci_device_handle(GArray *table_data,
build_append_int_noprefix(table_data, 0, 12);
}
+static void build_append_srat_acpi_device_handle(GArray *table_data,
+ const char *hid,
+ uint32_t uid)
+{
+ assert(strlen(hid) == 8);
+ /* Device Handle - ACPI */
+ for (int i = 0; i < sizeof(hid); i++) {
+ build_append_int_noprefix(table_data, hid[i], 1);
+ }
+ build_append_int_noprefix(table_data, uid, 4);
+ build_append_int_noprefix(table_data, 0, 4);
+}
+
/*
* ACPI spec, Revision 6.3
* 5.2.16.6 Generic Initiator Affinity Structure
@@ -1981,6 +1994,32 @@ void build_srat_pci_generic_initiator(GArray *table_data, int node,
build_append_int_noprefix(table_data, 0, 4);
}
+/*
+ * ACPI spec, Revision 6.5
+ * 5.2.16.7 Generic Port Affinity Structure
+ * With ACPI Device Handle.
+ */
+void build_srat_acpi_generic_port(GArray *table_data, uint32_t node,
+ const char *hid, uint32_t uid)
+{
+ /* Type */
+ build_append_int_noprefix(table_data, 6, 1);
+ /* Length */
+ build_append_int_noprefix(table_data, 32, 1);
+ /* Reserved */
+ build_append_int_noprefix(table_data, 0, 1);
+ /* Device Handle Type: ACPI */
+ build_append_int_noprefix(table_data, 0, 1);
+ /* Proximity Domain */
+ build_append_int_noprefix(table_data, node, 4);
+ /* Device Handle */
+ build_append_srat_acpi_device_handle(table_data, hid, uid);
+ /* Flags - GP Enabled */
+ build_append_int_noprefix(table_data, 1, 4);
+ /* Reserved */
+ build_append_int_noprefix(table_data, 0, 4);
+}
+
/*
* ACPI spec 5.2.17 System Locality Distance Information Table
* (Revision 2.0 or later)
diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c
index 3e1db161cc..d7a0e91f01 100644
--- a/hw/acpi/pci.c
+++ b/hw/acpi/pci.c
@@ -30,6 +30,7 @@
#include "hw/boards.h"
#include "hw/acpi/aml-build.h"
#include "hw/acpi/pci.h"
+#include "hw/pci/pci_bridge.h"
#include "hw/pci/pci_device.h"
#include "hw/pci/pcie_host.h"
@@ -177,9 +178,122 @@ static int build_acpi_generic_initiator(Object *obj, void *opaque)
return 0;
}
-void build_srat_generic_pci_initiator(GArray *table_data)
+typedef struct AcpiGenericPort {
+ /* private */
+ Object parent;
+
+ /* public */
+ char *pci_bus;
+ uint32_t node;
+} AcpiGenericPort;
+
+typedef struct AcpiGenericPortClass {
+ ObjectClass parent_class;
+} AcpiGenericPortClass;
+
+#define TYPE_ACPI_GENERIC_PORT "acpi-generic-port"
+
+OBJECT_DEFINE_TYPE_WITH_INTERFACES(AcpiGenericPort, acpi_generic_port,
+ ACPI_GENERIC_PORT, OBJECT,
+ { TYPE_USER_CREATABLE },
+ { NULL })
+
+OBJECT_DECLARE_SIMPLE_TYPE(AcpiGenericPort, ACPI_GENERIC_PORT)
+
+static void acpi_generic_port_init(Object *obj)
+{
+ AcpiGenericPort *gp = ACPI_GENERIC_PORT(obj);
+
+ gp->node = MAX_NODES;
+ gp->pci_bus = NULL;
+}
+
+static void acpi_generic_port_finalize(Object *obj)
+{
+ AcpiGenericPort *gp = ACPI_GENERIC_PORT(obj);
+
+ g_free(gp->pci_bus);
+}
+
+static void acpi_generic_port_set_pci_bus(Object *obj, const char *val,
+ Error **errp)
+{
+ AcpiGenericPort *gp = ACPI_GENERIC_PORT(obj);
+
+ gp->pci_bus = g_strdup(val);
+}
+
+static void acpi_generic_port_set_node(Object *obj, Visitor *v,
+ const char *name, void *opaque,
+ Error **errp)
+{
+ AcpiGenericPort *gp = ACPI_GENERIC_PORT(obj);
+ uint32_t value;
+
+ if (!visit_type_uint32(v, name, &value, errp)) {
+ return;
+ }
+
+ if (value >= MAX_NODES) {
+ error_printf("%s: Invalid NUMA node specified\n",
+ TYPE_ACPI_GENERIC_INITIATOR);
+ exit(1);
+ }
+
+ gp->node = value;
+}
+
+static void acpi_generic_port_class_init(ObjectClass *oc, void *data)
+{
+ object_class_property_add_str(oc, "pci-bus", NULL,
+ acpi_generic_port_set_pci_bus);
+ object_class_property_set_description(oc, "pci-bus",
+ "PCI Bus of the host bridge associated with this GP affinity structure");
+ object_class_property_add(oc, "node", "int", NULL,
+ acpi_generic_port_set_node, NULL, NULL);
+ object_class_property_set_description(oc, "node",
+ "The NUMA node like ID to index HMAT/SLIT NUMA properties involving GP");
+}
+
+static int build_acpi_generic_port(Object *obj, void *opaque)
+{
+ MachineState *ms = MACHINE(qdev_get_machine());
+ const char *hid = "ACPI0016";
+ GArray *table_data = opaque;
+ AcpiGenericPort *gp;
+ uint32_t uid;
+ Object *o;
+
+ if (!object_dynamic_cast(obj, TYPE_ACPI_GENERIC_PORT)) {
+ return 0;
+ }
+
+ gp = ACPI_GENERIC_PORT(obj);
+
+ if (gp->node >= ms->numa_state->num_nodes) {
+ error_printf("%s: node %d is invalid.\n",
+ TYPE_ACPI_GENERIC_PORT, gp->node);
+ exit(1);
+ }
+
+ o = object_resolve_path_type(gp->pci_bus, TYPE_PXB_CXL_BUS, NULL);
+ if (!o) {
+ error_printf("%s: device must be a CXL host bridge.\n",
+ TYPE_ACPI_GENERIC_PORT);
+ exit(1);
+ }
+
+ uid = object_property_get_uint(o, "acpi_uid", &error_fatal);
+ build_srat_acpi_generic_port(table_data, gp->node, hid, uid);
+
+ return 0;
+}
+
+void build_srat_generic_affinity_structures(GArray *table_data)
{
object_child_foreach_recursive(object_get_root(),
build_acpi_generic_initiator,
table_data);
+ object_child_foreach_recursive(object_get_root(), build_acpi_generic_port,
+ table_data);
}
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index b5973c9148..620992c92c 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -510,7 +510,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
}
}
- build_srat_generic_pci_initiator(table_data);
+ build_srat_generic_affinity_structures(table_data);
if (ms->nvdimms_state->is_enabled) {
nvdimm_build_srat(table_data);
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 88227e343e..d01e704162 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1973,7 +1973,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
build_srat_memory(table_data, 0, 0, 0, MEM_AFFINITY_NOFLAGS);
}
- build_srat_generic_pci_initiator(table_data);
+ build_srat_generic_affinity_structures(table_data);
/*
* Entry is required for Windows to enable memory hotplug in OS
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index 3d52ea5867..4578e03024 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -38,7 +38,6 @@ DECLARE_INSTANCE_CHECKER(PXBBus, PXB_BUS,
DECLARE_INSTANCE_CHECKER(PXBBus, PXB_PCIE_BUS,
TYPE_PXB_PCIE_BUS)
-#define TYPE_PXB_CXL_BUS "pxb-cxl-bus"
DECLARE_INSTANCE_CHECKER(PXBBus, PXB_CXL_BUS,
TYPE_PXB_CXL_BUS)
--
MST
next prev parent reply other threads:[~2024-11-04 21:07 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-04 21:05 [PULL 00/65] virtio,pc,pci: features, fixes, cleanups Michael S. Tsirkin
2024-11-04 21:05 ` [PULL 01/65] softmmu: Expand comments describing max_bounce_buffer_size Michael S. Tsirkin
2024-11-04 21:05 ` [PULL 02/65] docs: fix vhost-user protocol doc Michael S. Tsirkin
2024-11-04 21:05 ` [PULL 03/65] hw/acpi: Fix ordering of BDF in Generic Initiator PCI Device Handle Michael S. Tsirkin
2024-11-04 21:05 ` [PULL 04/65] hw/acpi/GI: Fix trivial parameter alignment issue Michael S. Tsirkin
2024-11-04 21:05 ` [PULL 05/65] hw/acpi: Move AML building code for Generic Initiators to aml_build.c Michael S. Tsirkin
2024-11-04 21:05 ` [PULL 06/65] hw/acpi: Rename build_all_acpi_generic_initiators() to build_acpi_generic_initiator() Michael S. Tsirkin
2024-11-04 21:05 ` [PULL 07/65] hw/pci: Add a busnr property to pci_props and use for acpi/gi Michael S. Tsirkin
2024-11-04 21:05 ` [PULL 08/65] acpi/pci: Move Generic Initiator object handling into acpi/pci.* Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 09/65] hw/pci-bridge: Add acpi_uid property to TYPE_PXB_BUS Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 10/65] hw/i386/acpi: Use TYPE_PXB_BUS property acpi_uid for DSDT Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 11/65] hw/pci-host/gpex-acpi: Use acpi_uid property Michael S. Tsirkin
2024-11-04 21:06 ` Michael S. Tsirkin [this message]
2024-11-05 9:06 ` [PULL 12/65] hw/acpi: Generic Port Affinity Structure support Daniel P. Berrangé
2024-11-06 7:20 ` Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 13/65] hw/acpi: Make storage of node id uint32_t to reduce fragility Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 14/65] hw/acpi: Generic Initiator - add missing object class property descriptions Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 15/65] hw/pci-bridge/cxl_root_port: Provide x-speed and x-width properties Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 16/65] hw/pci-bridge/cxl_upstream: " Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 17/65] hw/pcie: Factor out PCI Express link register filling common to EP Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 18/65] hw/pcie: Provide a utility function for control of EP / SW USP link Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 19/65] hw/mem/cxl-type3: Add properties to control link speed and width Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 20/65] hw/pci-bridge/cxl-upstream: " Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 21/65] qdev-monitor: add option to report GenericError from find_device_state Michael S. Tsirkin
2024-11-04 21:06 ` [PULL 22/65] vhost-user-blk: split vhost_user_blk_sync_config() Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 23/65] qapi: introduce device-sync-config Michael S. Tsirkin
2024-11-05 9:10 ` Daniel P. Berrangé
2024-11-06 7:19 ` Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 24/65] acpi/disassemle-aml.sh: fix up after dir reorg Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 25/65] tests/acpi: pc: allow DSDT acpi table changes Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 26/65] hw/i386/acpi-build: return a non-var package from _PRT() Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 27/65] tests/acpi: pc: update golden masters for DSDT Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 28/65] amd_iommu: Rename variable mmio to mr_mmio Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 29/65] amd_iommu: Add support for pass though mode Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 30/65] amd_iommu: Use shared memory region for Interrupt Remapping Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 31/65] amd_iommu: Send notification when invalidate interrupt entry cache Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 32/65] amd_iommu: Check APIC ID > 255 for XTSup Michael S. Tsirkin
2024-11-10 11:06 ` Phil Dennis-Jordan
2024-11-11 5:39 ` Shukla, Santosh
2024-11-13 10:53 ` Phil Dennis-Jordan
2024-11-04 21:07 ` [PULL 33/65] virtio-pci: fix memory_region_find for VirtIOPCIRegion's MR Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 34/65] virtio/vhost-user: fix qemu abort when hotunplug vhost-user-net device Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 35/65] hw/cxl: Fix uint32 overflow cxl-mailbox-utils.c Michael S. Tsirkin
2024-11-04 21:07 ` [PULL 36/65] hw/cxl: Fix background completion percentage calculation Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 37/65] mem/cxl_type3: Fix overlapping region validation error Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 38/65] hw/mem/cxl_type3: Fix More flag setting for dynamic capacity event records Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 39/65] hw/cxl/cxl-mailbox-utils: Fix for device DDR5 ECS control feature tables Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 40/65] hw/cxl: Fix indent of structure member Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 41/65] hw/pci-bridge: Make pxb_dev_realize_common() return if it succeeded Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 42/65] vhost-user: fix shared object return values Michael S. Tsirkin
2024-11-04 21:24 ` Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 44/65] pcie: enable Extended tag field support Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 45/65] cxl/cxl-mailbox-utils: Fix size check for cmd_firmware_update_get_info Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 46/65] hw/cxl/cxl-mailbox-util: Fix output buffer index update when retrieving DC extents Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 47/65] hw/cxl: Check size of input data to dynamic capacity mailbox commands Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 48/65] hw/cxl: Check input includes at least the header in cmd_features_set_feature() Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 49/65] hw/cxl: Check input length is large enough in cmd_events_clear_records() Michael S. Tsirkin
2024-11-04 21:08 ` [PULL 50/65] hw/cxl: Check enough data in cmd_firmware_update_transfer() Michael S. Tsirkin
2024-11-04 21:23 ` Michael S. Tsirkin
2024-11-04 21:09 ` [PULL 53/65] hw/cxl: Ensuring enough data to read parameters in cmd_tunnel_management_cmd() Michael S. Tsirkin
2024-11-04 21:09 ` [PULL 54/65] hw/cxl: Check that writes do not go beyond end of target attributes Michael S. Tsirkin
2024-11-04 21:09 ` [PULL 55/65] hw/cxl: Ensure there is enough data for the header in cmd_ccls_set_lsa() Michael S. Tsirkin
2024-11-04 21:09 ` [PULL 56/65] hw/cxl: Ensure there is enough data to read the input header in cmd_get_physical_port_state() Michael S. Tsirkin
2024-11-04 21:09 ` [PULL 57/65] hw/pci: Add parenthesis to PCI_BUILD_BDF macro Michael S. Tsirkin
2024-11-04 21:09 ` [PULL 58/65] hw/acpi: Make CPUs ACPI `presence` conditional during vCPU hot-unplug Michael S. Tsirkin
2024-11-04 21:09 ` [PULL 59/65] qtest: allow ACPI DSDT Table changes Michael S. Tsirkin
2024-11-04 21:09 ` [PULL 60/65] hw/acpi: Update ACPI `_STA` method with QOM vCPU ACPI Hotplug states Michael S. Tsirkin
2024-11-05 12:50 ` Igor Mammedov
2024-11-05 21:12 ` Salil Mehta via
2024-11-06 9:00 ` Igor Mammedov
2024-11-06 10:34 ` Salil Mehta via
2024-11-04 21:09 ` [PULL 61/65] tests/qtest/bios-tables-test: Update DSDT golden masters for x86/{pc,q35} Michael S. Tsirkin
2024-11-04 21:09 ` [PULL 62/65] hw/acpi: Update GED with vCPU Hotplug VMSD for migration Michael S. Tsirkin
2024-11-04 21:09 ` [PULL 63/65] intel_iommu: Send IQE event when setting reserved bit in IQT_TAIL Michael S. Tsirkin
2024-11-04 21:09 ` [PULL 64/65] intel_iommu: Add missed sanity check for 256-bit invalidation queue Michael S. Tsirkin
2024-11-04 21:09 ` [PULL 65/65] intel_iommu: Add missed reserved bit check for IEC descriptor Michael S. Tsirkin
2024-11-04 21:23 ` [PULL 51/65] hw/cxl: Check the length of data requested fits in get_log() Michael S. Tsirkin
2024-11-04 21:23 ` [PULL 52/65] hw/cxl: Avoid accesses beyond the end of cel_log Michael S. Tsirkin
2024-11-04 21:24 ` [PULL 43/65] intel_iommu: Introduce property "stale-tm" to control Transient Mapping (TM) field Michael S. Tsirkin
2024-11-05 21:26 ` [PULL 00/65] virtio,pc,pci: features, fixes, cleanups Peter Maydell
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