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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id f20sm25720348wrd.96.2021.02.21.14.51.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 21 Feb 2021 14:51:01 -0800 (PST) Subject: Re: [RFC PATCH] target/mips/cp0_timer: Use new clock_ns_to_ticks() To: Peter Maydell References: <20210210234334.3750022-1-f4bug@amsat.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Sun, 21 Feb 2021 23:51:00 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x334.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hao Wu , Aleksandar Rikalo , Luc Michel , QEMU Developers , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 2/21/21 9:12 PM, Peter Maydell wrote: > On Sun, 21 Feb 2021 at 20:07, Philippe Mathieu-Daudé wrote: >> >> On 2/11/21 12:43 AM, Philippe Mathieu-Daudé wrote: >>> Use the new clock_ns_to_ticks() function in cp0_timer where >>> appropriate. This allows us to remove CPUMIPSState::cp0_count_ns >>> and mips_cp0_period_set(). >>> >>> Signed-off-by: Philippe Mathieu-Daudé >>> --- >>> Based-on: <20210209132040.5091-1-peter.maydell@linaro.org> >>> >>> RFC because this is just a starter patch to test Peter's series >>> providing a handy function which "tells me how many times this >>> clock would tick in this length of time". >>> >>> Also because we could rethink the MIPS CP0 timer logic to avoid >>> too frequent divu128 calls (painful on 32-bit hosts). >>> >>> The style should be updated, using more variables for easier >>> review. env_archcpu() could eventually be dropped (by passing >>> MIPSCPU* instead of CPUMIPSState*). >> >> I guess it is better to wait for Peter patches to get merged >> before posting the updated patches (not much, just one previous >> patch MIPSCPU* instead of CPUMIPSState*). > > This patch is still on my to-review queue, fwiw (though I am > taking a week off work next week, so I probably won't get to > it til March.) Thanks for the update, I'll repost during the first day of March then :) Also I'll try to rebase my "hw/char/serial: Use the Clock API to feed the UART reference clock" too. Regards, Phil.