From: Richard Henderson <richard.henderson@linaro.org>
To: Michael Rolnik <mrolnik@gmail.com>
Cc: Sarah Harris <S.E.Harris@kent.ac.uk>,
QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v21 4/7] target/avr: Add instruction translation
Date: Wed, 12 Jun 2019 09:36:07 -0700 [thread overview]
Message-ID: <a8747ed2-4671-e370-38ff-10016f55a9e0@linaro.org> (raw)
In-Reply-To: <CAK4993hk62Tg4F9Gq+zFr6wbZ==fP7UPB42zc+sBJrKSztwHyQ@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 405 bytes --]
On 6/11/19 2:02 PM, Michael Rolnik wrote:
> I am using this
> one https://github.com/seharris/qemu-avr-tests/blob/master/free-rtos/Demo/AVR_ATMega2560_GCC/demo.elf
> <https://github.com/seharris/qemu-avr-tests/blob/master/free-rtos/Demo/AVR_ATMega2560_GCC/demo.elf>
> it fails within __divmodsi4 function, there is rcall right after sbrc.
>
> Thanks for helping.
Two separate bugs, fixed thus.
r~
[-- Attachment #2: 0001-fixup-target-avr-Add-instruction-translation.patch --]
[-- Type: text/x-patch, Size: 2052 bytes --]
>From 7be2c4dfcbdca59f6b5b52f65f3fc1df6923db50 Mon Sep 17 00:00:00 2001
From: Richard Henderson <richard.henderson@linaro.org>
Date: Wed, 12 Jun 2019 09:31:14 -0700
Subject: [PATCH] !fixup target/avr: Add instruction translation
When skipping, the skipped NORETURN must chain to the next.
Avoid double-allocating goto_tb indexes. Choose index 1 to
be the end of TB, which means all other branches use 0.
---
target/avr/translate.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/avr/translate.c b/target/avr/translate.c
index 4d9e2afa26..abb838b53f 100644
--- a/target/avr/translate.c
+++ b/target/avr/translate.c
@@ -622,7 +622,7 @@ static bool trans_BRBC(DisasContext *ctx, arg_BRBC *a)
}
tcg_gen_brcondi_i32(tcg_invert_cond(cond), var, 0, not_taken);
- gen_goto_tb(ctx, 1, ctx->npc + a->imm);
+ gen_goto_tb(ctx, 0, ctx->npc + a->imm);
gen_set_label(not_taken);
ctx->bstate = DISAS_CHAIN;
@@ -672,7 +672,7 @@ static bool trans_BRBS(DisasContext *ctx, arg_BRBS *a)
}
tcg_gen_brcondi_i32(tcg_invert_cond(cond), var, 0, not_taken);
- gen_goto_tb(ctx, 1, ctx->npc + a->imm);
+ gen_goto_tb(ctx, 0, ctx->npc + a->imm);
gen_set_label(not_taken);
ctx->bstate = DISAS_CHAIN;
@@ -2855,6 +2855,9 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
if (skip_label) {
canonicalize_skip(&ctx);
gen_set_label(skip_label);
+ if (ctx.bstate == DISAS_NORETURN) {
+ ctx.bstate = DISAS_CHAIN;
+ }
}
} while (ctx.bstate == DISAS_NEXT
&& num_insns < max_insns
@@ -2876,7 +2879,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
case DISAS_CHAIN:
if (!nonconst_skip) {
/* Note gen_goto_tb checks singlestep. */
- gen_goto_tb(&ctx, 0, ctx.npc);
+ gen_goto_tb(&ctx, 1, ctx.npc);
break;
}
tcg_gen_movi_tl(cpu_pc, ctx.npc);
--
2.17.1
next prev parent reply other threads:[~2019-06-12 16:37 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-06 19:30 [Qemu-devel] [PATCH v21 0/7] QEMU AVR 8 bit cores Michael Rolnik
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 1/7] target/avr: Add outward facing interfaces and core CPU logic Michael Rolnik
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 2/7] target/avr: Add instruction helpers Michael Rolnik
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 3/7] target/avr: Add instruction decoding Michael Rolnik
2019-06-10 15:05 ` Richard Henderson
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 4/7] target/avr: Add instruction translation Michael Rolnik
2019-06-10 15:09 ` Richard Henderson
2019-06-10 20:09 ` Richard Henderson
2019-06-10 20:35 ` Richard Henderson
2019-06-10 20:50 ` Richard Henderson
2019-06-10 21:20 ` Richard Henderson
2019-06-11 20:21 ` Michael Rolnik
2019-06-11 20:47 ` Richard Henderson
2019-06-11 21:02 ` Michael Rolnik
2019-06-12 16:36 ` Richard Henderson [this message]
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 5/7] target/avr: Add limited support for USART and 16 bit timer peripherals Michael Rolnik
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 6/7] target/avr: Add example board configuration Michael Rolnik
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 7/7] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file Michael Rolnik
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