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From: Richard Henderson <richard.henderson@linaro.org>
To: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: Question about TCG liveness_pass_1
Date: Fri, 17 Mar 2023 07:02:01 -0700	[thread overview]
Message-ID: <a8d13f61-6354-454d-2983-eeb65cb6bc61@linaro.org> (raw)
In-Reply-To: <66de3418-1fbf-ead1-bf29-f9e06523cdf2@linux.alibaba.com>

On 3/16/23 19:57, LIU Zhiwei wrote:
> Hi Richard,
> 
> When I read the tcg code, I find a corner case which may be a bug in liveness_pass_1.
> 
> I see all TEMP_TBs or global temps are set to TS_DEAD | TS_MEM when enter liveness_pass_1. 
> Think about the  sequence.
> 
> 
> 1)Write_global_temp_0 // 0->TS_DEAD, but not recorded in arg_life

Here TS_MEM->TS_DEAD, so *is* recorded in arg_life.

> 2)INDEX_op_qemu_st   //trigger an exception here.

Here TCG_OPF_SIDE_EFFECTS is set, so call la_global_sync, so  0->TS_MEM.

> 
> 3)Ref_global_temp_0   // TS_DEAD->0
> 
> 4)Write_global_temp_0 // TS_DEAD | TS_MEM -> TS_DEAD
> 
> As 1) will not write to memory, its register will be reused by the 3). I think it may miss 
> a write to global_temp_0 when enter an exception.

Was there a specific test case that you find is miscompiled?


r~



  reply	other threads:[~2023-03-17 14:02 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-17  2:57 Question about TCG liveness_pass_1 LIU Zhiwei
2023-03-17 14:02 ` Richard Henderson [this message]
2023-03-18 10:10   ` LIU Zhiwei

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