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([2a01:e0a:59e:9d80:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id ay23-20020a05622a229700b0042a5c2a81a8sm614103qtb.60.2024.01.24.05.57.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 24 Jan 2024 05:57:45 -0800 (PST) Message-ID: Date: Wed, 24 Jan 2024 14:57:41 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] virtio-iommu: Add an option to define the input range width Content-Language: en-US To: Alex Williamson Cc: eric.auger.pro@gmail.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, jean-philippe@linaro.org, peter.maydell@linaro.org, zhenzhong.duan@intel.com, peterx@redhat.com, yanghliu@redhat.com, mst@redhat.com, clg@redhat.com, jasowang@redhat.com References: <20240123181753.413961-1-eric.auger@redhat.com> <20240123181753.413961-2-eric.auger@redhat.com> <20240123165141.7a79de34.alex.williamson@redhat.com> <20240124063700.67c8c32c.alex.williamson@redhat.com> From: Eric Auger In-Reply-To: <20240124063700.67c8c32c.alex.williamson@redhat.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.5, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Alex, On 1/24/24 14:37, Alex Williamson wrote: > On Wed, 24 Jan 2024 14:14:19 +0100 > Eric Auger wrote: > >> Hi Alex, >> >> On 1/24/24 00:51, Alex Williamson wrote: >>> On Tue, 23 Jan 2024 19:15:55 +0100 >>> Eric Auger wrote: >>> >>>> aw-bits is a new option that allows to set the bit width of >>>> the input address range. This value will be used as a default for >>>> the device config input_range.end. By default it is set to 64 bits >>>> which is the current value. >>>> >>>> Signed-off-by: Eric Auger >>>> --- >>>> include/hw/virtio/virtio-iommu.h | 1 + >>>> hw/virtio/virtio-iommu.c | 4 +++- >>>> 2 files changed, 4 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/include/hw/virtio/virtio-iommu.h b/include/hw/virtio/virtio-iommu.h >>>> index 781ebaea8f..5fbe4677c2 100644 >>>> --- a/include/hw/virtio/virtio-iommu.h >>>> +++ b/include/hw/virtio/virtio-iommu.h >>>> @@ -66,6 +66,7 @@ struct VirtIOIOMMU { >>>> bool boot_bypass; >>>> Notifier machine_done; >>>> bool granule_frozen; >>>> + uint8_t aw_bits; >>>> }; >>>> >>>> #endif >>>> diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c >>>> index ec2ba11d1d..e7f299e0c6 100644 >>>> --- a/hw/virtio/virtio-iommu.c >>>> +++ b/hw/virtio/virtio-iommu.c >>>> @@ -1314,7 +1314,8 @@ static void virtio_iommu_device_realize(DeviceState *dev, Error **errp) >>>> */ >>>> s->config.bypass = s->boot_bypass; >>>> s->config.page_size_mask = qemu_real_host_page_mask(); >>>> - s->config.input_range.end = UINT64_MAX; >>>> + s->config.input_range.end = >>>> + s->aw_bits == 64 ? UINT64_MAX : BIT_ULL(s->aw_bits) - 1; >>> What happens when someone sets aw_bits = 1? There are a whole bunch of >>> impractical values here ripe for annoying bug reports. vtd_realize() >>> returns an Error for any values other than 39 or 48. We might pick an >>> arbitrary lower bound (39?) or some other more creative solution here >>> to avoid those silly issues in our future. Thanks, >> You're right. I can check the input value. This needs to be dependent on >> the machine though but this should be feasable. >> Then I would allow 39 and 48 for q35 and 64 only on ARM. > AFAIK AMD-Vi supports 64-bit address space. Without querying the host > there's no way to place an accurate limit below 64-bit. Thanks, Hum this means I would need to look at /sys/class/iommu//amd-iommu/ or /sys/class/iommu/dmar* to discriminate between AMD IOMMU and INTEL IOMMU physical IOMMU. Would that be acceptable? Eric > > Alex > >>>> s->config.domain_range.end = UINT32_MAX; >>>> s->config.probe_size = VIOMMU_PROBE_SIZE; >>>> >>>> @@ -1525,6 +1526,7 @@ static Property virtio_iommu_properties[] = { >>>> DEFINE_PROP_LINK("primary-bus", VirtIOIOMMU, primary_bus, >>>> TYPE_PCI_BUS, PCIBus *), >>>> DEFINE_PROP_BOOL("boot-bypass", VirtIOIOMMU, boot_bypass, true), >>>> + DEFINE_PROP_UINT8("aw-bits", VirtIOIOMMU, aw_bits, 64), >>>> DEFINE_PROP_END_OF_LIST(), >>>> }; >>>>