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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-453823ad0f3sm81282035e9.19.2025.06.27.05.34.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Jun 2025 05:34:15 -0700 (PDT) Message-ID: Date: Fri, 27 Jun 2025 14:34:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 10/11] qtest/bios-tables-test: Add tests for legacy smmuv3 and smmuv3 device Content-Language: en-US To: Shameer Kolothum , qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, jgg@nvidia.com, nicolinc@nvidia.com, ddutile@redhat.com, berrange@redhat.com, imammedo@redhat.com, nathanc@nvidia.com, mochs@nvidia.com, smostafa@google.com, gustavo.romero@linaro.org, linuxarm@huawei.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, zhangfei.gao@linaro.org References: <20250623094230.76084-1-shameerali.kolothum.thodi@huawei.com> <20250623094230.76084-11-shameerali.kolothum.thodi@huawei.com> From: Eric Auger In-Reply-To: <20250623094230.76084-11-shameerali.kolothum.thodi@huawei.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/23/25 11:42 AM, Shameer Kolothum wrote: > For the legacy SMMUv3 test, the setup includes three PCIe Root Complexes, > one of which has bypass_iommu enabled. The generated IORT table contains > a single SMMUv3 node and a Root Complex node with three ID mappings. Two > of these ID mappings have output references pointing to the SMMUv3 node > and the remianing one points to ITS. remaining > > For the -device arm-smmuv3,... test, the configuration also includes three > Root Complexes, with two connected to separate SMMUv3 devices. By the way I have never paid attention to the fact there is only 1 single IORT node despite we have 3 GPEX/PXB devices > The resulting IORT table contains two SMMUv3 nodes and a Root Complex node > with ID mappings of which two of the ID mappings have output references above is a bit difficult to parse. Suggesting: The resulting IORT table contains 1 RC node, 2 SMMU nodes and 1 ITS node. > pointing to two different SMMUv3 nodes and the remaining ones to ITS. RC node features 3 ID mappings. 2 of them target the 2 SMMU nodes while the last one targets the ITS. a drawing might be simpler         pcie.0 -> {SMMU0} -> {ITS} {RC}    pcie.1 -> {SMMU1} -> {ITS}         pcie.2            -> {ITS} > > Signed-off-by: Shameer Kolothum > --- > tests/qtest/bios-tables-test.c | 86 ++++++++++++++++++++++++++++++++++ > 1 file changed, 86 insertions(+) > > diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c > index 0b2bdf9d0d..1c50541b43 100644 > --- a/tests/qtest/bios-tables-test.c > +++ b/tests/qtest/bios-tables-test.c > @@ -2231,6 +2231,86 @@ static void test_acpi_aarch64_virt_viot(void) > free_test_data(&data); > } > > +static void test_acpi_aarch64_virt_smmuv3_legacy(void) > +{ > + test_data data = { > + .machine = "virt", > + .arch = "aarch64", > + .tcg_only = true, > + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd", > + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd", > + .ram_start = 0x40000000ULL, > + .scan_len = 128ULL * MiB, > + }; > + > + /* > + * cdrom is plugged into scsi controller to avoid conflict > + * with pxb-pcie. See comments in test_acpi_aarch64_virt_tcg_pxb() for > + * details. > + * > + * The setup includes three PCIe root complexes, one of which has > + * bypass_iommu enabled. The generated IORT table contains a single > + * SMMUv3 node and a Root Complex node with three ID mappings. Two > + * of the ID mappings have output references pointing to the SMMUv3 > + * node and the remaining one points to ITS. > + */ > + data.variant = ".smmuv3-legacy"; > + test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1" > + " -device virtio-scsi-pci,id=scsi0,bus=pci.1" > + " -drive file=" > + "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2," > + "if=none,media=cdrom,id=drive-scsi0-0-0-1,readonly=on" > + " -device scsi-cd,bus=scsi0.0,scsi-id=0," > + "drive=drive-scsi0-0-0-1,id=scsi0-0-0-1,bootindex=1" > + " -cpu cortex-a57" > + " -M iommu=smmuv3" > + " -device pxb-pcie,id=pcie.1,bus=pcie.0,bus_nr=0x10" > + " -device pxb-pcie,id=pcie.2,bus=pcie.0,bus_nr=0x20,bypass_iommu=on", > + &data); > + free_test_data(&data); > +} > + > +static void test_acpi_aarch64_virt_smmuv3_dev(void) > +{ > + test_data data = { > + .machine = "virt", > + .arch = "aarch64", > + .tcg_only = true, > + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd", > + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd", > + .ram_start = 0x40000000ULL, > + .scan_len = 128ULL * MiB, > + }; > + > + /* > + * cdrom is plugged into scsi controller to avoid conflict > + * with pxb-pcie. See comments in test_acpi_aarch64_virt_tcg_pxb() > + * for details. > + * > + * The setup includes three PCie root complexes, two of which are > + * connected to separate SMMUv3 devices. The resulting IORT table > + * contains two SMMUv3 nodes and a Root Complex node with ID mappings > + * of which two of the ID mappings have output references pointing > + * to two different SMMUv3 nodes and the remaining ones pointing to > + * ITS. > + */ > + data.variant = ".smmuv3-dev"; > + test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1" > + " -device virtio-scsi-pci,id=scsi0,bus=pci.1" > + " -drive file=" > + "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2," > + "if=none,media=cdrom,id=drive-scsi0-0-0-1,readonly=on" > + " -device scsi-cd,bus=scsi0.0,scsi-id=0," > + "drive=drive-scsi0-0-0-1,id=scsi0-0-0-1,bootindex=1" > + " -cpu cortex-a57" > + " -device arm-smmuv3,primary-bus=pcie.0,id=smmuv3.0" > + " -device pxb-pcie,id=pcie.1,bus=pcie.0,bus_nr=0x10" > + " -device arm-smmuv3,primary-bus=pcie.1,id=smmuv3.1" > + " -device pxb-pcie,id=pcie.2,bus=pcie.0,bus_nr=0x20", > + &data); > + free_test_data(&data); > +} > + > #ifndef _WIN32 > # define DEV_NULL "/dev/null" > #else > @@ -2586,6 +2666,12 @@ int main(int argc, char *argv[]) > if (qtest_has_device("virtio-iommu-pci")) { > qtest_add_func("acpi/virt/viot", test_acpi_aarch64_virt_viot); > } > + qtest_add_func("acpi/virt/smmuv3-legacy", > + test_acpi_aarch64_virt_smmuv3_legacy); > + if (qtest_has_device("arm-smmuv3")) { > + qtest_add_func("acpi/virt/smmuv3-dev", > + test_acpi_aarch64_virt_smmuv3_dev); > + } > } > } else if (strcmp(arch, "riscv64") == 0) { > if (has_tcg && qtest_has_device("virtio-blk-pci")) { Besides Reviewed-by: Eric Auger Eric