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Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH] target/arm: Avoid over-length shift in arm_cpu_sve_finalize() error case Content-Language: en-US To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20230704154332.3014896-1-peter.maydell@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20230704154332.3014896-1-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.09, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 4/7/23 17:43, Peter Maydell wrote: > If you build QEMU with the clang sanitizer enabled, you can see it > fire when running the arm-cpu-features test: > > $ QTEST_QEMU_BINARY=./build/arm-clang/qemu-system-aarch64 ./build/arm-clang/tests/qtest/arm-cpu-features > [...] > ../../target/arm/cpu64.c:125:19: runtime error: shift exponent 64 is too large for 64-bit type 'unsigned long long' > [...] > > This happens because the user can specify some incorrect SVE > properties that result in our calculating a max_vq of 0. We catch > this and error out, but before we do that we calculate > > vq_mask = MAKE_64BIT_MASK(0, max_vq);$ > > and the MAKE_64BIT_MASK() call is only valid for lengths that are > greater than zero, so we hit the undefined behaviour. Can we fix it generically? -- >8 -- --- a/include/qemu/bitops.h +++ b/include/qemu/bitops.h @@ -28,3 +28,3 @@ #define MAKE_64BIT_MASK(shift, length) \ - (((~0ULL) >> (64 - (length))) << (shift)) + ((length) ? (((~0ULL) >> (64 - (length))) << (shift)) : 0) --- > > Change the logic so that if max_vq is 0 we specifically set vq_mask > to 0 without going via MAKE_64BIT_MASK(). This lets us drop the > max_vq check from the error-exit logic, because if max_vq is 0 then > vq_map must now be 0. > > The UB only happens in the case where the user passed us an incorrect > set of SVE properties, so it's not a big problem in practice. > > Signed-off-by: Peter Maydell > --- > target/arm/cpu64.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c > index 6eaf8e32cfa..6012e4ef549 100644 > --- a/target/arm/cpu64.c > +++ b/target/arm/cpu64.c > @@ -122,10 +122,10 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) > vq = ctz32(tmp) + 1; > > max_vq = vq <= ARM_MAX_VQ ? vq - 1 : ARM_MAX_VQ; > - vq_mask = MAKE_64BIT_MASK(0, max_vq); > + vq_mask = max_vq > 0 ? MAKE_64BIT_MASK(0, max_vq) : 0; > vq_map = vq_supported & ~vq_init & vq_mask; > > - if (max_vq == 0 || vq_map == 0) { > + if (vq_map == 0) { > error_setg(errp, "cannot disable sve%d", vq * 128); > error_append_hint(errp, "Disabling sve%d results in all " > "vector lengths being disabled.\n", Reviewed-by: Philippe Mathieu-Daudé