From: Richard Henderson <richard.henderson@linaro.org>
To: matheus.ferst@eldorado.org.br, qemu-devel@nongnu.org,
qemu-ppc@nongnu.org
Cc: lucas.castro@eldorado.org.br, luis.pires@eldorado.org.br,
groug@kaod.org, david@gibson.dropbear.id.au
Subject: Re: [PATCH v3 25/25] target/ppc: cntlzdm/cnttzdm implementation without brcond
Date: Thu, 4 Nov 2021 13:41:27 -0400 [thread overview]
Message-ID: <a975c894-c49b-3f04-70d4-5bf461ac4e07@linaro.org> (raw)
In-Reply-To: <20211104123719.323713-26-matheus.ferst@eldorado.org.br>
On 11/4/21 8:37 AM, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst<matheus.ferst@eldorado.org.br>
>
> Suggested-by: Richard Henderson<richard.henderson@linaro.org>
> Signed-off-by: Matheus Ferst<matheus.ferst@eldorado.org.br>
> ---
> target/ppc/translate/fixedpoint-impl.c.inc | 31 +++++++++++-----------
> 1 file changed, 16 insertions(+), 15 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2021-11-04 17:48 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-04 12:36 [PATCH v3 00/25] PowerISA v3.1 instruction batch matheus.ferst
2021-11-04 12:36 ` [PATCH v3 01/25] target/ppc: Move vcfuged to vmx-impl.c.inc matheus.ferst
2021-11-04 12:36 ` [PATCH v3 02/25] target/ppc: Implement vclzdm/vctzdm instructions matheus.ferst
2021-11-04 12:36 ` [PATCH v3 03/25] target/ppc: Implement vpdepd/vpextd instruction matheus.ferst
2021-11-04 12:36 ` [PATCH v3 04/25] target/ppc: Implement vsldbi/vsrdbi instructions matheus.ferst
2021-11-04 12:36 ` [PATCH v3 05/25] target/ppc: Implement Vector Insert from GPR using GPR index insns matheus.ferst
2021-11-04 17:40 ` Richard Henderson
2021-11-04 12:37 ` [PATCH v3 06/25] target/ppc: Implement Vector Insert Word from GPR using Immediate insns matheus.ferst
2021-11-04 12:37 ` [PATCH v3 07/25] target/ppc: Implement Vector Insert from VSR using GPR index insns matheus.ferst
2021-11-04 12:37 ` [PATCH v3 08/25] target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree matheus.ferst
2021-11-04 12:37 ` [PATCH v3 09/25] target/ppc: Implement Vector Extract Double to VSR using GPR index insns matheus.ferst
2021-11-04 12:37 ` [PATCH v3 10/25] target/ppc: Introduce REQUIRE_VSX macro matheus.ferst
2021-11-04 12:37 ` [PATCH v3 11/25] target/ppc: receive high/low as argument in get/set_cpu_vsr matheus.ferst
2021-11-04 12:37 ` [PATCH v3 12/25] target/ppc: moved stxv and lxv from legacy to decodtree matheus.ferst
2021-11-04 12:37 ` [PATCH v3 13/25] target/ppc: moved stxvx and lxvx " matheus.ferst
2021-11-04 12:37 ` [PATCH v3 14/25] target/ppc: added the instructions LXVP and STXVP matheus.ferst
2021-11-04 12:37 ` [PATCH v3 15/25] target/ppc: added the instructions LXVPX and STXVPX matheus.ferst
2021-11-04 12:37 ` [PATCH v3 16/25] target/ppc: added the instructions PLXV and PSTXV matheus.ferst
2021-11-04 12:37 ` [PATCH v3 17/25] target/ppc: added the instructions PLXVP and PSTXVP matheus.ferst
2021-11-04 12:37 ` [PATCH v3 18/25] target/ppc: moved XXSPLTW to using decodetree matheus.ferst
2021-11-04 12:37 ` [PATCH v3 19/25] target/ppc: moved XXSPLTIB " matheus.ferst
2021-11-04 12:37 ` [PATCH v3 20/25] target/ppc: implemented XXSPLTI32DX matheus.ferst
2021-11-04 12:37 ` [PATCH v3 21/25] target/ppc: Implemented XXSPLTIW using decodetree matheus.ferst
2021-11-04 12:37 ` [PATCH v3 22/25] target/ppc: implemented XXSPLTIDP instruction matheus.ferst
2021-11-04 12:37 ` [PATCH v3 23/25] target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions matheus.ferst
2021-11-04 12:37 ` [PATCH v3 24/25] target/ppc: Implement lxvkq instruction matheus.ferst
2021-11-04 12:37 ` [PATCH v3 25/25] target/ppc: cntlzdm/cnttzdm implementation without brcond matheus.ferst
2021-11-04 17:41 ` Richard Henderson [this message]
2021-11-05 1:26 ` [PATCH v3 00/25] PowerISA v3.1 instruction batch David Gibson
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