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Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH 03/15] hw/timer/arm_timer: Add missing sp804_unrealize() handler Content-Language: en-US To: Peter Maydell Cc: qemu-devel@nongnu.org, Thomas Huth , qemu-arm@nongnu.org, Sergey Kambalin References: <20230531203559.29140-1-philmd@linaro.org> <20230531203559.29140-4-philmd@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.09, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 8/6/23 16:41, Peter Maydell wrote: > On Wed, 31 May 2023 at 21:36, Philippe Mathieu-Daudé wrote: >> >> Release the IRQs allocated in sp804_realize() in the >> corresponding sp804_unrealize() handler. >> >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> hw/timer/arm_timer.c | 10 ++++++++++ >> 1 file changed, 10 insertions(+) >> +static void sp804_unrealize(DeviceState *dev) >> +{ >> + SP804State *s = SP804(dev); >> + >> + for (unsigned i = 0; i < ARRAY_SIZE(s->timer); i++) { >> + qemu_free_irq(s->timer[i]->irq); >> + } >> +} > > I don't really see the purpose in this. It doesn't actually > avoid a leak if we ever destroy an SP804, because > s->timer[i] itself is memory allocated by arm_timer_init() > which we don't clean up (the arm_timer_state not being > a qdev). If we did convert arm_timer_state to qdev > then these interrupts should turn into being sysbus irqs > and gpio inputs on the relevant devices. (In fact if you > were willing to take the migration-compat hit you > could just have the sp804 create a 2 input OR gate and > wire the arm_timer irqs up to it and use the output > of the OR gate as the sp804 outbound interrupt line.) Thank for the suggestion, I didn't notice the OR.