From: Marcel Apfelbaum <marcel@redhat.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: qemu-devel@nongnu.org, abologna@redhat.com
Subject: Re: [Qemu-devel] [PATCH V4 0/3] hw/pcie: Introduce Generic PCI Express Root Port
Date: Wed, 25 Jan 2017 21:30:17 +0200 [thread overview]
Message-ID: <a9c24d1e-a957-13ac-115f-435aa73d060d@redhat.com> (raw)
In-Reply-To: <20170125211506-mutt-send-email-mst@kernel.org>
On 01/25/2017 09:15 PM, Michael S. Tsirkin wrote:
> On Wed, Jan 25, 2017 at 09:03:55PM +0200, Marcel Apfelbaum wrote:
>> v3 -> v4:
>> - Rebased on master.
>
>
> No need for this. Pls check that my pci branch is ok.
>
I see hw/pci-bridge/gen_pcie_root_port.c still uses the macro VMSTATE_PCIE_DEVICE
removed by the commit 20daa90 (PCI/migration merge vmstate_pci_device and vmstate_pcie_device),
so it can't work.
I couldn't check the issue because the pci tree compilation fails on:
qemu/hw/display/qxl.c: In function ‘qxl_rom_size’:
qemu/hw/display/qxl.c:313:20: error: bit-field ‘<anonymous>’ width not an integer constant
QEMU_BUILD_BUG_ON(required_rom_size > rom_size);
^
qemu/rules.mak:64: recipe for target 'hw/display/qxl.o' failed
Thanks,
Marcel
>
>> v2 -> v3:
>> - Keep only the root port base class code in pcie_root_port.c (Michael)
>> - Use msix for the generic root port implementation (Michael and Gerd)
>> - The task required some refactoring like having some common
>> init/uninit interrupts functions to be implemented by both
>> generic and Intel Root Ports.
>>
>> v1 -> v2:
>> - Rebased on master.
>>
>> The Generic Root Port behaves the same as the
>> Intel's IOH device with id 3420, without having
>> Intel specific attributes.
>>
>> The device has two purposes:
>> (1) Can be used on both X86 and ARM machines.
>> (2) It will allow us to tweak the behaviour
>> (e.g add vendor-specific PCI capabilities)
>> - something that obviously cannot be done
>> on a known device.
>>
>> Patch 1/3: Introduce a base class for Root Ports - most of the code
>> is migrated from IOH3420 implementation.
>> Patch 2/3: Derives the IOH3420 from the new base class
>> Patch 3/3: Introduces the generic Root Port.
>>
>> Tested with Linux and Windows guests only on x86 hosts.
>>
>> Marcel Apfelbaum (3):
>> hw/pcie: Introduce a base class for PCI Express Root Ports
>> hw/ioh3420: derive from PCI Express Root Port base class
>> hw/pcie: Introduce Generic PCI Express Root Port
>>
>> default-configs/arm-softmmu.mak | 1 +
>> default-configs/i386-softmmu.mak | 1 +
>> default-configs/x86_64-softmmu.mak | 1 +
>> hw/pci-bridge/Makefile.objs | 1 +
>> hw/pci-bridge/gen_pcie_root_port.c | 88 +++++++++++++++++++
>> hw/pci-bridge/ioh3420.c | 121 ++++----------------------
>> hw/pci-bridge/pcie_root_port.c | 171 +++++++++++++++++++++++++++++++++++++
>> include/hw/pci/pci.h | 1 +
>> include/hw/pci/pcie_port.h | 19 +++++
>> 9 files changed, 298 insertions(+), 106 deletions(-)
>> create mode 100644 hw/pci-bridge/gen_pcie_root_port.c
>> create mode 100644 hw/pci-bridge/pcie_root_port.c
>>
>> --
>> 2.5.5
prev parent reply other threads:[~2017-01-25 19:30 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-25 19:03 [Qemu-devel] [PATCH V4 0/3] hw/pcie: Introduce Generic PCI Express Root Port Marcel Apfelbaum
2017-01-25 19:03 ` [Qemu-devel] [PATCH V4 1/3] hw/pcie: Introduce a base class for PCI Express Root Ports Marcel Apfelbaum
2017-01-25 19:03 ` [Qemu-devel] [PATCH V4 2/3] hw/ioh3420: derive from PCI Express Root Port base class Marcel Apfelbaum
2017-01-25 19:03 ` [Qemu-devel] [PATCH V4 3/3] hw/pcie: Introduce Generic PCI Express Root Port Marcel Apfelbaum
2017-01-25 19:15 ` [Qemu-devel] [PATCH V4 0/3] " Michael S. Tsirkin
2017-01-25 19:30 ` Marcel Apfelbaum [this message]
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