From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: "Corvin Köhne" <corvin.koehne@gmail.com>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org,
"Yannick Voßen" <y.vossen@beckhoff.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Alistair Francis" <alistair@alistair23.me>,
"Corvin Köhne" <c.koehne@beckhoff.com>,
"Paolo Bonzini" <pbonzini@redhat.com>
Subject: Re: [PATCH 06/21] hw/dma/zynq-devcfg: Simulate dummy PL reset
Date: Fri, 25 Apr 2025 18:20:59 +0200 [thread overview]
Message-ID: <aAu2a1V4D_5JZf7n@zapote> (raw)
In-Reply-To: <20250318130817.119636-7-corvin.koehne@gmail.com>
On Tue, Mar 18, 2025 at 02:07:57PM +0100, Corvin Köhne wrote:
> From: YannickV <Y.Vossen@beckhoff.com>
>
> Setting PCFG_PROG_B should reset the PL. After a reset PCFG_INIT
> should indicate that the reset is finished successfully.
>
> In order to add a MMIO-Device as part of the PL in the Zynq, the
> reset logic must succeed. The PCFG_INIT flag is now set when the
> PL reset is triggered by PCFG_PROG_B. Indicating the reset was
> successful.
>
> Signed-off-by: Yannick Voßen <y.vossen@beckhoff.com>
> ---
> hw/dma/xlnx-zynq-devcfg.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/hw/dma/xlnx-zynq-devcfg.c b/hw/dma/xlnx-zynq-devcfg.c
> index 611a57b4d4..c44b802b22 100644
> --- a/hw/dma/xlnx-zynq-devcfg.c
> +++ b/hw/dma/xlnx-zynq-devcfg.c
> @@ -49,6 +49,7 @@
>
> REG32(CTRL, 0x00)
> FIELD(CTRL, FORCE_RST, 31, 1) /* Not supported, wr ignored */
> + FIELD(CTRL, PCFG_PROG_B, 30, 1)
> FIELD(CTRL, PCAP_PR, 27, 1) /* Forced to 0 on bad unlock */
> FIELD(CTRL, PCAP_MODE, 26, 1)
> FIELD(CTRL, MULTIBOOT_EN, 24, 1)
> @@ -116,6 +117,7 @@ REG32(STATUS, 0x14)
> FIELD(STATUS, PSS_GTS_USR_B, 11, 1)
> FIELD(STATUS, PSS_FST_CFG_B, 10, 1)
> FIELD(STATUS, PSS_CFG_RESET_B, 5, 1)
> + FIELD(STATUS, PCFG_INIT, 4, 1)
>
> REG32(DMA_SRC_ADDR, 0x18)
> REG32(DMA_DST_ADDR, 0x1C)
> @@ -209,6 +211,14 @@ static uint64_t r_ctrl_pre_write(RegisterInfo *reg, uint64_t val)
> val |= lock_ctrl_map[i] & s->regs[R_CTRL];
> }
> }
> +
> + uint32_t pcfg_prog_b = FIELD_EX32(val, CTRL, PCFG_PROG_B);
The declaration of pcfg_prog_b shouldn't be in the middle of a block.
Since PCFG_PROG_B is a single bit, better to use bool.
Or just skip the variable all together and do:
if (FIELD_EX32(val, CTRL, PCFG_PROG_B)) {
> + if (pcfg_prog_b) {
> + s->regs[R_STATUS] |= R_STATUS_PCFG_INIT_MASK;
> + } else {
> + s->regs[R_STATUS] &= ~R_STATUS_PCFG_INIT_MASK;
> + }
> +
> return val;
> }
>
> --
> 2.49.0
>
next prev parent reply other threads:[~2025-04-25 16:22 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-18 13:07 [PATCH 00/21] Hi, Corvin Köhne
2025-03-18 13:07 ` [PATCH 01/21] hw/timer: Make frequency configurable Corvin Köhne
2025-03-18 13:07 ` [PATCH 02/21] hw/timer: Make PERIPHCLK period configurable Corvin Köhne
2025-03-18 13:07 ` [PATCH 03/21] hw/dma/zynq-devcfg: Handle bitstream loading via DMA to 0xffffffff Corvin Köhne
2025-04-25 15:47 ` Edgar E. Iglesias
2025-03-18 13:07 ` [PATCH 04/21] hw/arm/zynq-devcfg: Prevent unintended unlock during initialization Corvin Köhne
2025-04-25 15:52 ` Edgar E. Iglesias
2025-03-18 13:07 ` [PATCH 05/21] hw/dma/zynq: Notify devcfg on FPGA reset via SLCR control Corvin Köhne
2025-04-25 16:11 ` Edgar E. Iglesias
2025-05-13 7:04 ` Corvin Köhne
2025-03-18 13:07 ` [PATCH 06/21] hw/dma/zynq-devcfg: Simulate dummy PL reset Corvin Köhne
2025-04-25 16:20 ` Edgar E. Iglesias [this message]
2025-03-18 13:07 ` [PATCH 07/21] hw/dma/zynq-devcfg: Indicate power-up status of PL Corvin Köhne
2025-04-25 16:24 ` Edgar E. Iglesias
2025-03-18 13:07 ` [PATCH 08/21] hw/dma/zynq-devcfg: Fix register memory Corvin Köhne
2025-04-25 16:27 ` Edgar E. Iglesias
2025-03-18 13:08 ` [PATCH 09/21] hw/misc: Add dummy ZYNQ DDR controller Corvin Köhne
2025-04-25 16:45 ` Edgar E. Iglesias
2025-05-05 9:01 ` Corvin Köhne
2025-03-18 13:08 ` [PATCH 10/21] hw/misc/zynq_slcr: Add logic for DCI configuration Corvin Köhne
2025-04-25 19:56 ` Edgar E. Iglesias
2025-03-18 13:08 ` [PATCH 11/21] hw/misc: Add Beckhoff CCAT device Corvin Köhne
2025-03-18 13:08 ` [PATCH 12/21] hw/arm: Add new machine based on xilinx-zynq-a9 for Beckhoff CX7200 Corvin Köhne
2025-03-18 13:08 ` [PATCH 13/21] hw/arm/beckhoff_CX7200: Remove second SD controller Corvin Köhne
2025-05-06 13:17 ` Peter Maydell
2025-03-18 13:08 ` [PATCH 14/21] hw/arm/beckhoff_CX7200: Remove second GEM Corvin Köhne
2025-03-18 13:08 ` [PATCH 15/21] hw/arm/beckhoff_CX7200: Adjust Flashes and Busses Corvin Köhne
2025-03-18 13:08 ` [PATCH 16/21] hw/arm/beckhoff_CX7200: Remove usb interfaces Corvin Köhne
2025-03-18 13:08 ` [PATCH 17/21] hw/arm/beckhoff_CX7200: Remove unimplemented devices Corvin Köhne
2025-03-18 13:08 ` [PATCH 18/21] hw/arm/beckhoff_CX7200: Set CPU frequency and PERIPHCLK period Corvin Köhne
2025-03-18 13:08 ` [PATCH 19/21] hw/arm/beckhoff_CX7200: Add CCAT to CX7200 Corvin Köhne
2025-03-18 13:08 ` [PATCH 20/21] hw/arm/beckhoff_CX7200: Add dummy DDR CTRL " Corvin Köhne
2025-03-18 13:08 ` [PATCH 21/21] MAINTAINERS: add myself as reviewer for Beckhoff devices Corvin Köhne
2025-04-24 10:48 ` [PATCH 00/21] hw/arm: add CX7200 board emulation Corvin Köhne
2025-04-25 19:59 ` Edgar E. Iglesias
2025-05-05 8:57 ` Corvin Köhne
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aAu2a1V4D_5JZf7n@zapote \
--to=edgar.iglesias@gmail.com \
--cc=alistair@alistair23.me \
--cc=c.koehne@beckhoff.com \
--cc=corvin.koehne@gmail.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=y.vossen@beckhoff.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).