From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: "Corvin Köhne" <corvin.koehne@gmail.com>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org,
"Yannick Voßen" <y.vossen@beckhoff.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Alistair Francis" <alistair@alistair23.me>,
"Corvin Köhne" <c.koehne@beckhoff.com>,
"Paolo Bonzini" <pbonzini@redhat.com>
Subject: Re: [PATCH 04/21] hw/arm/zynq-devcfg: Prevent unintended unlock during initialization
Date: Fri, 25 Apr 2025 17:52:00 +0200 [thread overview]
Message-ID: <aAuvoFjhS0VEtpqq@zapote> (raw)
In-Reply-To: <20250318130817.119636-5-corvin.koehne@gmail.com>
On Tue, Mar 18, 2025 at 02:07:55PM +0100, Corvin Köhne wrote:
> From: YannickV <Y.Vossen@beckhoff.com>
>
> During the emulation startup, all registers are reset, which triggers the
> `r_unlock_post_write` function with a value of 0. This led to an
> unintended memory access disable, making the devcfg unusable.
>
> To address this, a property 'is_initialized' is introduced. It is set
> to false during reset and updated to true once the initialization is
> complete. The unlock function is simply ignored while 'is_initialized'
> is false.
>
> I have no idea how this ever worked. Nevertheless, this restores the
> correct behavior.
>
> Signed-off-by: Yannick Voßen <y.vossen@beckhoff.com>
> ---
> hw/dma/xlnx-zynq-devcfg.c | 6 +++++-
> include/hw/dma/xlnx-zynq-devcfg.h | 2 ++
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/hw/dma/xlnx-zynq-devcfg.c b/hw/dma/xlnx-zynq-devcfg.c
> index b838c1c0d0..03b5280228 100644
> --- a/hw/dma/xlnx-zynq-devcfg.c
> +++ b/hw/dma/xlnx-zynq-devcfg.c
> @@ -143,9 +143,11 @@ static void xlnx_zynq_devcfg_reset(DeviceState *dev)
> XlnxZynqDevcfg *s = XLNX_ZYNQ_DEVCFG(dev);
> int i;
>
> + s->is_initialized = false;
> for (i = 0; i < XLNX_ZYNQ_DEVCFG_R_MAX; ++i) {
> register_reset(&s->regs_info[i]);
> }
> + s->is_initialized = true;
> }
>
> static void xlnx_zynq_devcfg_dma_go(XlnxZynqDevcfg *s)
> @@ -221,7 +223,9 @@ static void r_unlock_post_write(RegisterInfo *reg, uint64_t val)
> {
> XlnxZynqDevcfg *s = XLNX_ZYNQ_DEVCFG(reg->opaque);
> const char *device_prefix = object_get_typename(OBJECT(s));
> -
> + if (!s->is_initialized) {
I think you can use device_is_in_reset(DEVICE(s))
and get rid of is_initialized alltogether?
> + return;
> + }
> if (val == R_UNLOCK_MAGIC) {
> DB_PRINT("successful unlock\n");
> s->regs[R_CTRL] |= R_CTRL_PCAP_PR_MASK;
> diff --git a/include/hw/dma/xlnx-zynq-devcfg.h b/include/hw/dma/xlnx-zynq-devcfg.h
> index e4cf085d70..2ab054e598 100644
> --- a/include/hw/dma/xlnx-zynq-devcfg.h
> +++ b/include/hw/dma/xlnx-zynq-devcfg.h
> @@ -55,6 +55,8 @@ struct XlnxZynqDevcfg {
> XlnxZynqDevcfgDMACmd dma_cmd_fifo[XLNX_ZYNQ_DEVCFG_DMA_CMD_FIFO_LEN];
> uint8_t dma_cmd_fifo_num;
>
> + bool is_initialized;
> +
> uint32_t regs[XLNX_ZYNQ_DEVCFG_R_MAX];
> RegisterInfo regs_info[XLNX_ZYNQ_DEVCFG_R_MAX];
> };
> --
> 2.49.0
>
next prev parent reply other threads:[~2025-04-25 15:53 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-18 13:07 [PATCH 00/21] Hi, Corvin Köhne
2025-03-18 13:07 ` [PATCH 01/21] hw/timer: Make frequency configurable Corvin Köhne
2025-03-18 13:07 ` [PATCH 02/21] hw/timer: Make PERIPHCLK period configurable Corvin Köhne
2025-03-18 13:07 ` [PATCH 03/21] hw/dma/zynq-devcfg: Handle bitstream loading via DMA to 0xffffffff Corvin Köhne
2025-04-25 15:47 ` Edgar E. Iglesias
2025-03-18 13:07 ` [PATCH 04/21] hw/arm/zynq-devcfg: Prevent unintended unlock during initialization Corvin Köhne
2025-04-25 15:52 ` Edgar E. Iglesias [this message]
2025-03-18 13:07 ` [PATCH 05/21] hw/dma/zynq: Notify devcfg on FPGA reset via SLCR control Corvin Köhne
2025-04-25 16:11 ` Edgar E. Iglesias
2025-05-13 7:04 ` Corvin Köhne
2025-03-18 13:07 ` [PATCH 06/21] hw/dma/zynq-devcfg: Simulate dummy PL reset Corvin Köhne
2025-04-25 16:20 ` Edgar E. Iglesias
2025-03-18 13:07 ` [PATCH 07/21] hw/dma/zynq-devcfg: Indicate power-up status of PL Corvin Köhne
2025-04-25 16:24 ` Edgar E. Iglesias
2025-03-18 13:07 ` [PATCH 08/21] hw/dma/zynq-devcfg: Fix register memory Corvin Köhne
2025-04-25 16:27 ` Edgar E. Iglesias
2025-03-18 13:08 ` [PATCH 09/21] hw/misc: Add dummy ZYNQ DDR controller Corvin Köhne
2025-04-25 16:45 ` Edgar E. Iglesias
2025-05-05 9:01 ` Corvin Köhne
2025-03-18 13:08 ` [PATCH 10/21] hw/misc/zynq_slcr: Add logic for DCI configuration Corvin Köhne
2025-04-25 19:56 ` Edgar E. Iglesias
2025-03-18 13:08 ` [PATCH 11/21] hw/misc: Add Beckhoff CCAT device Corvin Köhne
2025-03-18 13:08 ` [PATCH 12/21] hw/arm: Add new machine based on xilinx-zynq-a9 for Beckhoff CX7200 Corvin Köhne
2025-03-18 13:08 ` [PATCH 13/21] hw/arm/beckhoff_CX7200: Remove second SD controller Corvin Köhne
2025-05-06 13:17 ` Peter Maydell
2025-03-18 13:08 ` [PATCH 14/21] hw/arm/beckhoff_CX7200: Remove second GEM Corvin Köhne
2025-03-18 13:08 ` [PATCH 15/21] hw/arm/beckhoff_CX7200: Adjust Flashes and Busses Corvin Köhne
2025-03-18 13:08 ` [PATCH 16/21] hw/arm/beckhoff_CX7200: Remove usb interfaces Corvin Köhne
2025-03-18 13:08 ` [PATCH 17/21] hw/arm/beckhoff_CX7200: Remove unimplemented devices Corvin Köhne
2025-03-18 13:08 ` [PATCH 18/21] hw/arm/beckhoff_CX7200: Set CPU frequency and PERIPHCLK period Corvin Köhne
2025-03-18 13:08 ` [PATCH 19/21] hw/arm/beckhoff_CX7200: Add CCAT to CX7200 Corvin Köhne
2025-03-18 13:08 ` [PATCH 20/21] hw/arm/beckhoff_CX7200: Add dummy DDR CTRL " Corvin Köhne
2025-03-18 13:08 ` [PATCH 21/21] MAINTAINERS: add myself as reviewer for Beckhoff devices Corvin Köhne
2025-04-24 10:48 ` [PATCH 00/21] hw/arm: add CX7200 board emulation Corvin Köhne
2025-04-25 19:59 ` Edgar E. Iglesias
2025-05-05 8:57 ` Corvin Köhne
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