From: "Daniel P. Berrangé" <berrange@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>,
Donald Dutile <ddutile@redhat.com>,
Markus Armbruster <armbru@redhat.com>,
Shameer Kolothum via <qemu-devel@nongnu.org>,
"qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
"eric.auger@redhat.com" <eric.auger@redhat.com>,
"jgg@nvidia.com" <jgg@nvidia.com>,
"nicolinc@nvidia.com" <nicolinc@nvidia.com>,
"nathanc@nvidia.com" <nathanc@nvidia.com>,
"mochs@nvidia.com" <mochs@nvidia.com>,
"smostafa@google.com" <smostafa@google.com>,
Linuxarm <linuxarm@huawei.com>,
"Wangzhou (B)" <wangzhou1@hisilicon.com>,
jiangkunkun <jiangkunkun@huawei.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
"zhangfei.gao@linaro.org" <zhangfei.gao@linaro.org>
Subject: Re: [PATCH v2 1/6] hw/arm/smmuv3: Add support to associate a PCIe RC
Date: Fri, 9 May 2025 11:46:24 +0100 [thread overview]
Message-ID: <aB3dAPNgXj7w9-7L@redhat.com> (raw)
In-Reply-To: <CAFEAcA-HWuAUVhqsE7p2BMo6wg+7F273Q_J2LVLrHzFagTjxgg@mail.gmail.com>
On Fri, May 09, 2025 at 11:37:14AM +0100, Peter Maydell wrote:
> On Fri, 9 May 2025 at 09:00, Shameerali Kolothum Thodi
> <shameerali.kolothum.thodi@huawei.com> wrote:
> > From: Peter Maydell <peter.maydell@linaro.org>
> > > The problem here seems to me to be that in the hardware we're
> > > modelling the SMMU always exists, because it's in the SoC,
> > > but you're trying to arrange for it to be created on the
> > > command line, via -device.
> > >
> > > We don't have any of these problems with the current 'virt'
> > > board code, because we have the board code create the iommu
> > > (if the user asks for it via the iommu machine property),
> > > and it can wire it up to the PCI root complex as needed.
> >
> > Yes, currently virt creates a SMMUv3 instance and associates it with
> > pcie.0 by default. However, this setup isn't ideal once we introduce
> > support for accelerated SMMUv3, where we need to configure the
> > host SMMUv3 for nested stage translation. This is essential for VFIO-PCI
> > passthrough scenarios, where the guest manages the stage-1 page tables
> > and the host manages stage-2.
> >
> > In such cases, devices may be associated with different host SMMUv3s,
> > and having a single vSMMUv3 in the guest isn't ideal as-
> >
> > -We would need to broadcast TLBIs or perform lookups to identify the
> > corresponding host SMMUv3.
> > -The physical SMMUv3s might differ in functionality.
> > -Some SMMUv3 implementations offer additional virtualization features (e.g., vCMDQ),
> > where the CMDQ is is directly gets mapped to the Guest and invalidations
> > aren't even trapped.
> >
> > Please refer to the earlier RFC [1], which proposed a new arm-smmuv3-accel
> > device. The main feedback on that RFC was to instead convert the existing
> > arm-smmuv3 into a user-creatable device, and introduce acceleration support
> > via an optional property:
> >
> > -device arm-smmuv3,accel=on,..
> >
> > This series is the first step toward that goal—making the current arm-smmuv3 device
> > user-creatable.
>
> (I want to start here by saying that I appreciate that I'm
> coming in without having read the previous discussion, so
> this is kind of going back over ground you've already
> been through.)
>
> I agree that rather than having an entirely separate "SMMU with
> acceleration" it would be better to have it be a property on
> the SMMU device. But why do we need it to be user created?
> Making it user-created leads into all kinds of tricky areas
> mostly surrounding the fact that QEMU right now simply doesn't
> support having user-created sysbus devices and other kinds
> of device with complex wiring-up. -device is really intended
> for "this is a model of a device that in real hardware is
> pluggable and has basically one connection, like a PCI card
> has a PCI-slot".
In terms of "why does it need to be user created" - the goal was to expose
multiple SMMUs to the guest, each associated with a separate physical SMMU.
IIUC, each physical NUMA node would have its own SMMU.
So configuring a guest VM will require creating multiple PXBs, one for
each virtual NUMA node, and then creating SMMUs for each PXB.
Since there was a need for the user to create SMMUs for the PXBs, the
question was then raised, why shouldn't the default SMMU also be
user creatable in the same way, so that mgmt apps like libvirt have
a single way to configure the SMMUs with -device.
With regards,
Daniel
--
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next prev parent reply other threads:[~2025-05-09 10:48 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-02 10:27 [PATCH v2 0/6] Add support for user creatable SMMUv3 device Shameer Kolothum via
2025-05-02 10:27 ` [PATCH v2 1/6] hw/arm/smmuv3: Add support to associate a PCIe RC Shameer Kolothum via
2025-05-02 17:22 ` Nicolin Chen
2025-05-06 8:14 ` Shameerali Kolothum Thodi via
2025-05-02 18:16 ` Donald Dutile
2025-05-05 8:19 ` Eric Auger
2025-05-06 9:07 ` Shameerali Kolothum Thodi via
2025-05-06 9:35 ` Eric Auger
2025-05-06 8:42 ` Shameerali Kolothum Thodi via
2025-05-06 11:47 ` Markus Armbruster
2025-05-06 12:20 ` Shameerali Kolothum Thodi via
2025-05-06 20:48 ` Donald Dutile
2025-05-07 7:17 ` Markus Armbruster
2025-05-07 8:50 ` Shameerali Kolothum Thodi via
2025-05-08 13:45 ` Donald Dutile
2025-05-08 13:57 ` Peter Maydell
2025-05-09 7:57 ` Markus Armbruster
2025-05-09 8:00 ` Shameerali Kolothum Thodi via
2025-05-09 10:37 ` Peter Maydell
2025-05-09 10:46 ` Daniel P. Berrangé [this message]
2025-05-09 11:43 ` Peter Maydell
2025-05-22 7:39 ` Shameerali Kolothum Thodi via
2025-05-16 20:53 ` Donald Dutile
2025-05-09 7:29 ` Shameerali Kolothum Thodi via
2025-05-09 8:14 ` Daniel P. Berrangé
2025-05-09 8:18 ` Shameerali Kolothum Thodi via
2025-05-09 8:44 ` Eric Auger
2025-05-02 10:27 ` [PATCH v2 2/6] hw/arm/virt-acpi-build: Update IORT for multiple smmuv3 devices Shameer Kolothum via
2025-05-02 17:13 ` Nicolin Chen
2025-05-02 18:18 ` Donald Dutile
2025-05-06 8:43 ` Shameerali Kolothum Thodi via
2025-05-06 8:00 ` Shameerali Kolothum Thodi via
2025-05-05 8:39 ` Eric Auger
2025-05-06 9:12 ` Shameerali Kolothum Thodi via
2025-05-02 10:27 ` [PATCH v2 3/6] hw/arm/virt: Factor out common SMMUV3 dt bindings code Shameer Kolothum via
2025-05-02 17:15 ` Nicolin Chen
2025-05-05 9:01 ` Eric Auger
2025-05-06 9:19 ` Shameerali Kolothum Thodi via
2025-05-02 10:27 ` [PATCH v2 4/6] hw/arm/virt: Add an SMMU_IO_LEN macro Shameer Kolothum via
2025-05-02 18:20 ` Donald Dutile
2025-05-05 9:03 ` Eric Auger
2025-05-02 10:27 ` [PATCH v2 5/6] hw/arm/virt: Add support for smmuv3 device Shameer Kolothum via
2025-05-02 17:54 ` Nicolin Chen
2025-05-06 8:36 ` Shameerali Kolothum Thodi via
2025-05-05 10:12 ` Eric Auger
2025-05-06 9:29 ` Shameerali Kolothum Thodi via
2025-05-02 10:27 ` [PATCH v2 6/6] hw/arm/smmuv3: Enable smmuv3 device creation Shameer Kolothum via
2025-05-02 18:00 ` Nicolin Chen
2025-05-05 10:13 ` Eric Auger
2025-05-02 18:11 ` [PATCH v2 0/6] Add support for user creatable SMMUv3 device Donald Dutile
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