From: "Daniel P. Berrangé" <berrange@redhat.com>
To: Magnus Kulke <magnuskulke@linux.microsoft.com>
Cc: magnuskulke@microsoft.com, qemu-devel@nongnu.org,
liuwe@microsoft.com, "Paolo Bonzini" <pbonzini@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Wei Liu" <wei.liu@kernel.org>,
"Phil Dennis-Jordan" <phil@philjordan.eu>,
"Roman Bolshakov" <rbolshakov@ddn.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Cameron Esfahani" <dirty@apple.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>
Subject: Re: [RFC PATCH 06/25] accel/mshv: Add accelerator skeleton
Date: Tue, 20 May 2025 13:02:01 +0100 [thread overview]
Message-ID: <aCxvOfF3ytXYnhp1@redhat.com> (raw)
In-Reply-To: <20250520113018.49569-7-magnuskulke@linux.microsoft.com>
On Tue, May 20, 2025 at 01:29:59PM +0200, Magnus Kulke wrote:
> Introduce the initial scaffold for the MSHV (Microsoft Hypervisor)
> accelerator backend. This includes the basic directory structure and
> stub implementations needed to integrate with QEMU's accelerator
> framework.
>
> Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
> ---
> accel/meson.build | 1 +
> accel/mshv/meson.build | 6 ++
> accel/mshv/mshv-all.c | 143 +++++++++++++++++++++++++++++++++++++++++
> include/system/mshv.h | 34 ++++++++++
> 4 files changed, 184 insertions(+)
> create mode 100644 accel/mshv/meson.build
> create mode 100644 accel/mshv/mshv-all.c
>
> diff --git a/accel/mshv/mshv-all.c b/accel/mshv/mshv-all.c
> new file mode 100644
> index 0000000000..44605adf94
> --- /dev/null
> +++ b/accel/mshv/mshv-all.c
> +
> +static int mshv_init(MachineState *ms)
> +{
> + error_report("unimplemented");
> + abort();
> +}
Nit-picking - although you remove these lines in later patches,
lets remove the tabs from these lines.
> diff --git a/include/system/mshv.h b/include/system/mshv.h
> index bc8f2c228a..0858e47def 100644
> --- a/include/system/mshv.h
> +++ b/include/system/mshv.h
> @@ -16,6 +16,14 @@
> #ifndef QEMU_MSHV_INT_H
> #define QEMU_MSHV_INT_H
>
> +#include "qemu/osdep.h"
> +#include "qemu/accel.h"
> +#include "hw/hyperv/hyperv-proto.h"
> +#include "hw/hyperv/linux-mshv.h"
> +#include "hw/hyperv/hvhdk.h"
> +#include "qapi/qapi-types-common.h"
> +#include "system/memory.h"
> +
> #ifdef COMPILING_PER_TARGET
> #ifdef CONFIG_MSHV
> #define CONFIG_MSHV_IS_POSSIBLE
> @@ -28,6 +36,32 @@
> #ifdef CONFIG_MSHV_IS_POSSIBLE
> extern bool mshv_allowed;
> #define mshv_enabled() (mshv_allowed)
> +
> +typedef struct MshvMemoryListener {
> + MemoryListener listener;
> + int as_id;
> +} MshvMemoryListener;
> +
> +typedef struct MshvAddressSpace {
> + MshvMemoryListener *ml;
> + AddressSpace *as;
> +} MshvAddressSpace;
Inconsistent mix of 2-space and 4-space
indents - stick with 4-space throughout
> +
> +typedef struct MshvState {
> + AccelState parent_obj;
> + int vm;
> + MshvMemoryListener memory_listener;
> + /* number of listeners */
> + int nr_as;
> + MshvAddressSpace *as;
> +} MshvState;
> +extern MshvState *mshv_state;
> +
> +struct AccelCPUState {
> + int cpufd;
> + bool dirty;
> +};
> +
> #else /* CONFIG_MSHV_IS_POSSIBLE */
> #define mshv_enabled() false
> #endif
> --
> 2.34.1
>
>
With regards,
Daniel
--
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next prev parent reply other threads:[~2025-05-20 12:02 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-20 11:29 [RFC PATCH 00/25] Implementing a MSHV (Microsoft Hypervisor) accelerator Magnus Kulke
2025-05-20 11:29 ` [RFC PATCH 01/25] accel: Add Meson and config support for MSHV accelerator Magnus Kulke
2025-05-20 11:50 ` Daniel P. Berrangé
2025-05-20 14:16 ` Paolo Bonzini
2025-05-20 11:29 ` [RFC PATCH 02/25] target/i386/emulate: allow instruction decoding from stream Magnus Kulke
2025-05-20 12:42 ` Paolo Bonzini
2025-05-20 17:29 ` Wei Liu
2025-05-20 11:29 ` [RFC PATCH 03/25] target/i386/mshv: Add x86 decoder/emu implementation Magnus Kulke
2025-05-20 11:54 ` Daniel P. Berrangé
2025-05-20 13:17 ` Paolo Bonzini
2025-05-20 17:36 ` Wei Liu
2025-05-20 11:29 ` [RFC PATCH 04/25] hw/intc: Generalize APIC helper names from kvm_* to accel_* Magnus Kulke
2025-05-20 11:29 ` [RFC PATCH 05/25] include/hw/hyperv: Add MSHV ABI header definitions Magnus Kulke
2025-05-20 14:24 ` Paolo Bonzini
2025-05-20 11:29 ` [RFC PATCH 06/25] accel/mshv: Add accelerator skeleton Magnus Kulke
2025-05-20 12:02 ` Daniel P. Berrangé [this message]
2025-05-20 12:38 ` Paolo Bonzini
2025-05-20 11:30 ` [RFC PATCH 07/25] accel/mshv: Register memory region listeners Magnus Kulke
2025-05-20 11:30 ` [RFC PATCH 08/25] accel/mshv: Initialize VM partition Magnus Kulke
2025-05-20 19:07 ` Wei Liu
2025-05-22 15:42 ` Magnus Kulke
2025-05-22 17:46 ` Wei Liu
2025-05-23 8:23 ` Magnus Kulke
2025-05-23 15:37 ` Wei Liu
2025-05-23 16:13 ` Magnus Kulke
2025-05-20 11:30 ` [RFC PATCH 09/25] accel/mshv: Register guest memory regions with hypervisor Magnus Kulke
2025-05-20 20:07 ` Wei Liu
2025-05-23 14:17 ` Magnus Kulke
2025-05-20 11:30 ` [RFC PATCH 10/25] accel/mshv: Add ioeventfd support Magnus Kulke
2025-05-20 11:30 ` [RFC PATCH 11/25] accel/mshv: Add basic interrupt injection support Magnus Kulke
2025-05-20 14:18 ` Paolo Bonzini
2025-05-20 20:15 ` Wei Liu
2025-05-27 16:27 ` Magnus Kulke
2025-05-20 11:30 ` [RFC PATCH 12/25] accel/mshv: Add vCPU creation and execution loop Magnus Kulke
2025-05-20 13:50 ` Paolo Bonzini
2025-05-20 13:54 ` Paolo Bonzini
2025-05-23 17:05 ` Wei Liu
2025-06-06 23:06 ` Nuno Das Neves
2025-05-20 11:30 ` [RFC PATCH 13/25] accel/mshv: Add vCPU signal handling Magnus Kulke
2025-05-20 11:30 ` [RFC PATCH 14/25] target/i386/mshv: Add CPU create and remove logic Magnus Kulke
2025-05-20 21:50 ` Wei Liu
2025-05-20 11:30 ` [RFC PATCH 15/25] target/i386/mshv: Implement mshv_store_regs() Magnus Kulke
2025-05-20 22:07 ` Wei Liu
2025-05-20 11:30 ` [RFC PATCH 16/25] target/i386/mshv: Implement mshv_get_standard_regs() Magnus Kulke
2025-05-20 22:09 ` Wei Liu
2025-05-20 11:30 ` [RFC PATCH 17/25] target/i386/mshv: Implement mshv_get_special_regs() Magnus Kulke
2025-05-20 14:05 ` Paolo Bonzini
2025-05-20 22:15 ` Wei Liu
2025-05-28 13:55 ` Magnus Kulke
2025-05-20 11:30 ` [RFC PATCH 18/25] target/i386/mshv: Implement mshv_arch_put_registers() Magnus Kulke
2025-05-20 14:33 ` Paolo Bonzini
2025-05-20 22:22 ` Wei Liu
2025-05-28 14:30 ` Magnus Kulke
2025-06-06 19:16 ` Wei Liu
2025-06-06 19:11 ` Wei Liu
2025-05-20 11:30 ` [RFC PATCH 19/25] target/i386/mshv: Set local interrupt controller state Magnus Kulke
2025-05-20 14:03 ` Paolo Bonzini
2025-05-20 11:30 ` [RFC PATCH 20/25] target/i386/mshv: Register CPUID entries with MSHV Magnus Kulke
2025-05-20 11:30 ` [RFC PATCH 21/25] target/i386/mshv: Register MSRs " Magnus Kulke
2025-05-20 11:30 ` [RFC PATCH 22/25] target/i386/mshv: Integrate x86 instruction decoder/emulator Magnus Kulke
2025-05-20 22:38 ` Wei Liu
2025-05-28 15:10 ` Magnus Kulke
2025-05-20 11:30 ` [RFC PATCH 23/25] target/i386/mshv: Write MSRs to the hypervisor Magnus Kulke
2025-05-20 11:30 ` [RFC PATCH 24/25] target/i386/mshv: Implement mshv_vcpu_run() Magnus Kulke
2025-05-20 13:21 ` Paolo Bonzini
2025-05-20 22:52 ` Wei Liu
2025-06-03 15:40 ` Magnus Kulke
2025-07-01 8:35 ` Magnus Kulke
2025-07-01 15:11 ` Wei Liu
2025-07-01 15:45 ` Magnus Kulke
2025-07-01 15:47 ` Wei Liu
2025-07-01 15:51 ` Magnus Kulke
2025-05-20 11:30 ` [RFC PATCH 25/25] accel/mshv: Add memory remapping workaround Magnus Kulke
2025-05-20 13:53 ` Paolo Bonzini
2025-05-22 12:51 ` Magnus Kulke
2025-05-20 14:25 ` [RFC PATCH 00/25] Implementing a MSHV (Microsoft Hypervisor) accelerator Paolo Bonzini
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