From: Zhao Liu <zhao1.liu@intel.com>
To: Ewan Hai <ewanhai-oc@zhaoxin.com>
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
"Daniel P . Berrangé" <berrange@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Jason Zeng" <jason.zeng@intel.com>,
"Xiaoyao Li" <xiaoyao.li@intel.com>, "Tao Su" <tao1.su@intel.com>,
"Yi Lai" <yi1.lai@intel.com>, "Dapeng Mi" <dapeng1.mi@intel.com>,
"Tejus GK" <tejus.gk@nutanix.com>,
"Manish Mishra" <manish.mishra@nutanix.com>,
qemu-devel@nongnu.org
Subject: Re: [PATCH 5/8] i386/cpu: Add a "x-force-cpuid-0x1f" property
Date: Fri, 27 Jun 2025 11:05:49 +0800 [thread overview]
Message-ID: <aF4Kjf7iGhEORMSL@intel.com> (raw)
In-Reply-To: <0d038476-e7c6-4e7a-add2-aeb4d715c202@zhaoxin.com>
> After applying these patches to QEMU mainline at commit 6e1571533fd9:
Ah, I forgot I've rebased these patches...Now you can rebase all the
patches at the latest master branch.
Or, you can try this repo - I just created it to make it easier for you:
https://gitlab.com/zhao.liu/qemu/-/tree/cache-model-v2.6-rebase-06-23-2025
Thanks,
Zhao
> $ git am patches-from-https://lore.kernel.org/qemu-devel/20250620092734.1576677-1-zhao1.liu@intel.com/
> $ git am patches-from-https://lore.kernel.org/all/20250626083105.2581859-6-zhao1.liu@intel.com/
>
> and configure && make qemu with:
>
> $ ./configure --target-list=x86_64-softmmu --enable-debug --enable-kvm
> --enable-sdl --enable-gtk --enable-spice --prefix=/usr --enable-libusb
> --enable-usb-redir --enable-trace-backends=simple && make -j32
>
> I ran into this build error:
>
> target/i386/cpu.c:9942:52: error: 'X86CPU' {aka 'struct ArchCPU'} has no
> member named 'force_cpuid_0x1f' ; did you mean 'enable_cpuid_0x1f' ?
>
> I haven't debug it yet, because it seems like a simple mistake, asking you
> directly might be quicker.
>
next prev parent reply other threads:[~2025-06-27 2:45 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-26 8:30 [PATCH 0/8] i386/cpu: Intel cache model & topo CPUID enhencement Zhao Liu
2025-06-26 8:30 ` [PATCH 1/8] i386/cpu: Introduce cache model for SierraForest Zhao Liu
2025-07-04 3:33 ` Mi, Dapeng
2025-07-07 0:57 ` Tao Su
2025-06-26 8:30 ` [PATCH 2/8] i386/cpu: Introduce cache model for GraniteRapids Zhao Liu
2025-07-04 3:34 ` Mi, Dapeng
2025-07-07 0:58 ` Tao Su
2025-06-26 8:31 ` [PATCH 3/8] i386/cpu: Introduce cache model for SapphireRapids Zhao Liu
2025-07-04 3:35 ` Mi, Dapeng
2025-07-07 0:58 ` Tao Su
2025-06-26 8:31 ` [PATCH 4/8] i386/cpu: Introduce cache model for YongFeng Zhao Liu
2025-06-29 9:47 ` Ewan Hai
2025-07-02 6:35 ` Zhao Liu
2025-07-02 9:35 ` Ewan Hai
2025-06-26 8:31 ` [PATCH 5/8] i386/cpu: Add a "x-force-cpuid-0x1f" property Zhao Liu
2025-06-26 12:07 ` Ewan Hai
2025-06-27 3:05 ` Zhao Liu [this message]
2025-06-27 6:48 ` Ewan Hai
2025-06-27 10:00 ` Zhao Liu
2025-07-04 3:38 ` Mi, Dapeng
2025-06-26 8:31 ` [PATCH 6/8] i386/cpu: Enable 0x1f leaf for SierraForest by default Zhao Liu
2025-07-04 3:45 ` Mi, Dapeng
2025-06-26 8:31 ` [PATCH 7/8] i386/cpu: Enable 0x1f leaf for GraniteRapids " Zhao Liu
2025-07-04 3:47 ` Mi, Dapeng
2025-06-26 8:31 ` [PATCH 8/8] i386/cpu: Enable 0x1f leaf for SapphireRapids " Zhao Liu
2025-07-04 3:48 ` Mi, Dapeng
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