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From: Zhao Liu <zhao1.liu@intel.com>
To: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Marcelo Tosatti" <mtosatti@redhat.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	"Daniel P . Berrangé" <berrange@redhat.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Babu Moger" <babu.moger@amd.com>,
	"Ewan Hai" <ewanhai-oc@zhaoxin.com>, "Pu Wen" <puwen@hygon.cn>,
	"Tao Su" <tao1.su@intel.com>, "Yi Lai" <yi1.lai@intel.com>,
	"Dapeng Mi" <dapeng1.mi@intel.com>,
	qemu-devel@nongnu.org, kvm@vger.kernel.org
Subject: Re: [PATCH 08/16] i386/cpu: Fix CPUID[0x80000006] for Intel CPU
Date: Thu, 3 Jul 2025 15:52:33 +0800	[thread overview]
Message-ID: <aGY2wfQJWeigUhm+@intel.com> (raw)
In-Reply-To: <bd979e2d-e036-4a1a-bf8a-0098eadb4821@linux.intel.com>

> >  static void encode_cache_cpuid80000006(CPUCacheInfo *l2,
> >                                         CPUCacheInfo *l3,
> > -                                       uint32_t *ecx, uint32_t *edx)
> > +                                       uint32_t *ecx, uint32_t *edx,
> > +                                       bool lines_per_tag_supported)
> >  {
> >      assert(l2->size % 1024 == 0);
> >      assert(l2->associativity > 0);
> > -    assert(l2->lines_per_tag > 0);
> > -    assert(l2->line_size > 0);
> 
> why remove the assert for l2->line_size?

Good catch! My bad...

> > +    assert(lines_per_tag_supported ?
> > +           l2->lines_per_tag > 0 : l2->lines_per_tag == 0);
> >      *ecx = ((l2->size / 1024) << 16) |
> > -           (AMD_ENC_ASSOC(l2->associativity) << 12) |
> > +           (X86_ENC_ASSOC(l2->associativity) << 12) |
> >             (l2->lines_per_tag << 8) | (l2->line_size);
> >  


  reply	other threads:[~2025-07-03  7:32 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-20  9:27 [PATCH 00/16] i386/cpu: Unify the cache model in X86CPUState Zhao Liu
2025-06-20  9:27 ` [PATCH 01/16] i386/cpu: Refine comment of CPUID2CacheDescriptorInfo Zhao Liu
2025-07-02  8:48   ` Mi, Dapeng
2025-07-03  7:38     ` Zhao Liu
2025-06-20  9:27 ` [PATCH 02/16] i386/cpu: Add descriptor 0x49 for CPUID 0x2 encoding Zhao Liu
2025-07-02  9:04   ` Mi, Dapeng
2025-07-03  7:39     ` Zhao Liu
2025-06-20  9:27 ` [PATCH 03/16] i386/cpu: Add default cache model for Intel CPUs with level < 4 Zhao Liu
2025-07-02  9:53   ` Mi, Dapeng
2025-07-03  7:47     ` Zhao Liu
2025-06-20  9:27 ` [PATCH 04/16] i386/cpu: Present same cache model in CPUID 0x2 & 0x4 Zhao Liu
2025-07-03  4:14   ` Mi, Dapeng
2025-07-03  6:35     ` Mi, Dapeng
2025-06-20  9:27 ` [PATCH 05/16] i386/cpu: Consolidate CPUID 0x4 leaf Zhao Liu
2025-06-26 12:10   ` Ewan Hai
2025-06-27  2:44     ` Zhao Liu
2025-07-03  6:41   ` Mi, Dapeng
2025-06-20  9:27 ` [PATCH 06/16] i386/cpu: Drop CPUID 0x2 specific cache info in X86CPUState Zhao Liu
2025-07-03  7:03   ` Mi, Dapeng
2025-06-20  9:27 ` [PATCH 07/16] i386/cpu: Mark CPUID[0x80000005] as reserved for Intel Zhao Liu
2025-07-03  7:07   ` Mi, Dapeng
2025-06-20  9:27 ` [PATCH 08/16] i386/cpu: Fix CPUID[0x80000006] for Intel CPU Zhao Liu
2025-07-03  7:09   ` Mi, Dapeng
2025-07-03  7:52     ` Zhao Liu [this message]
2025-06-20  9:27 ` [PATCH 09/16] i386/cpu: Add legacy_intel_cache_info cache model Zhao Liu
2025-07-03  7:15   ` Mi, Dapeng
2025-06-20  9:27 ` [PATCH 10/16] i386/cpu: Add legacy_amd_cache_info " Zhao Liu
2025-07-03  7:18   ` Mi, Dapeng
2025-06-20  9:27 ` [PATCH 11/16] i386/cpu: Select legacy cache model based on vendor in CPUID 0x2 Zhao Liu
2025-07-03  8:47   ` Mi, Dapeng
2025-06-20  9:27 ` [PATCH 12/16] i386/cpu: Select legacy cache model based on vendor in CPUID 0x4 Zhao Liu
2025-07-03  8:49   ` Mi, Dapeng
2025-06-20  9:27 ` [PATCH 13/16] i386/cpu: Select legacy cache model based on vendor in CPUID 0x80000005 Zhao Liu
2025-07-03  8:52   ` Mi, Dapeng
2025-06-20  9:27 ` [PATCH 14/16] i386/cpu: Select legacy cache model based on vendor in CPUID 0x80000006 Zhao Liu
2025-06-20  9:27 ` [PATCH 15/16] i386/cpu: Select legacy cache model based on vendor in CPUID 0x8000001D Zhao Liu
2025-06-20  9:27 ` [PATCH 16/16] i386/cpu: Use a unified cache_info in X86CPUState Zhao Liu
2025-07-03  8:53   ` Mi, Dapeng
2025-07-03  9:50     ` Zhao Liu

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