qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Francisco Iglesias <francisco.iglesias@amd.com>
To: Luc Michel <luc.michel@amd.com>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Edgar E . Iglesias" <edgar.iglesias@amd.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Frederic Konrad" <frederic.konrad@amd.com>,
	"Sai Pavan Boddu" <sai.pavan.boddu@amd.com>
Subject: Re: [PATCH 46/48] docs/system/arm/xlnx-versal-virt: add a note about dumpdtb
Date: Thu, 31 Jul 2025 23:02:22 +0200	[thread overview]
Message-ID: <aIvZ3pFqwFQNwEnH@xse-figlesia-l2.amd.com> (raw)
In-Reply-To: <20250716095432.81923-47-luc.michel@amd.com>

On Wed, Jul 16, 2025 at 11:54:28AM +0200, Luc Michel wrote:
> Add a note in the DTB section explaining how to dump the generated DTB
> using the dumpdtb machine option.
> 
> Signed-off-by: Luc Michel <luc.michel@amd.com>

Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>

> ---
>  docs/system/arm/xlnx-versal-virt.rst | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/docs/system/arm/xlnx-versal-virt.rst b/docs/system/arm/xlnx-versal-virt.rst
> index 94c8bacf61a..5d7fa18592b 100644
> --- a/docs/system/arm/xlnx-versal-virt.rst
> +++ b/docs/system/arm/xlnx-versal-virt.rst
> @@ -63,11 +63,17 @@ Users can load firmware or boot-loaders with the ``-device loader`` options.
>  
>  When loading an OS, QEMU generates a DTB and selects an appropriate address
>  where it gets loaded. This DTB will be passed to the kernel in register x0.
>  
>  If there's no ``-kernel`` option, we generate a DTB and place it at 0x1000
> -for boot-loaders or firmware to pick it up.
> +for boot-loaders or firmware to pick it up. To dump and observe the generated
> +DTB, one can use the ``dumpdtb`` machine option:
> +
> +.. code-block:: bash
> +
> +  $ qemu-system-aarch64 -M amd-versal-virt,dumpdtb=example.dtb -m 2G
> +
>  
>  If users want to provide their own DTB, they can use the ``-dtb`` option.
>  These DTBs will have their memory nodes modified to match QEMU's
>  selected ram_size option before they get passed to the kernel or FW.
>  
> -- 
> 2.50.0
> 


  reply	other threads:[~2025-07-31 21:26 UTC|newest]

Thread overview: 106+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-16  9:53 [PATCH 00/48] AMD Versal Gen 2 support Luc Michel
2025-07-16  9:53 ` [PATCH 01/48] hw/net/cadence_gem: fix register mask initialization Luc Michel
2025-07-24  8:30   ` Francisco Iglesias
2025-07-28  8:47   ` Boddu, Sai Pavan
2025-07-16  9:53 ` [PATCH 02/48] hw/arm/xlnx-versal: split the xlnx-versal type Luc Michel
2025-07-28 16:59   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 03/48] hw/arm/xlnx-versal: prepare for FDT creation Luc Michel
2025-07-28 17:13   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 04/48] hw/arm/xlnx-versal: uart: refactor creation Luc Michel
2025-07-28 17:29   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 05/48] hw/arm/xlnx-versal: canfd: " Luc Michel
2025-07-28 20:44   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 06/48] hw/arm/xlnx-versal: sdhci: " Luc Michel
2025-07-28 20:50   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 07/48] hw/arm/xlnx-versal: gem: " Luc Michel
2025-07-28 20:56   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 08/48] hw/arm/xlnx-versal: adma: " Luc Michel
2025-07-28 21:02   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 09/48] hw/arm/xlnx-versal: xram: " Luc Michel
2025-07-28 21:05   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 10/48] hw/arm/xlnx-versal: usb: " Luc Michel
2025-07-28 21:13   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 11/48] hw/arm/xlnx-versal: efuse: " Luc Michel
2025-07-29 13:25   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 12/48] hw/arm/xlnx-versal: ospi: " Luc Michel
2025-07-29 13:34   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 13/48] hw/arm/xlnx-versal: VersalMap: add support for OR'ed IRQs Luc Michel
2025-07-29 13:42   ` Francisco Iglesias
2025-08-04 12:24   ` Peter Maydell
2025-08-18 13:30     ` Luc Michel
2025-08-19 15:25       ` Peter Maydell
2025-08-20  7:18         ` Luc Michel
2025-08-21 13:55           ` Peter Maydell
2025-08-22 15:19             ` Luc Michel
2025-08-22 15:41               ` Peter Maydell
2025-07-16  9:53 ` [PATCH 14/48] hw/arm/xlnx-versal: PMC IOU SCLR: refactor creation Luc Michel
2025-07-29 19:41   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 15/48] hw/arm/xlnx-versal: bbram: " Luc Michel
2025-07-29 19:48   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 16/48] hw/arm/xlnx-versal: trng: " Luc Michel
2025-07-29 19:50   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 17/48] hw/arm/xlnx-versal: rtc: " Luc Michel
2025-07-29 19:54   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 18/48] hw/arm/xlnx-versal: cfu: " Luc Michel
2025-07-29 19:58   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 19/48] hw/arm/xlnx-versal: crl: " Luc Michel
2025-07-29 20:00   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 20/48] hw/arm/xlnx-versal-virt: virtio: " Luc Michel
2025-07-29 20:04   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 21/48] hw/arm/xlnx-versal: refactor CPU cluster creation Luc Michel
2025-07-29 20:13   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 22/48] hw/arm/xlnx-versal: add the mp_affinity property to the CPU mapping Luc Michel
2025-07-29 20:15   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 23/48] hw/arm/xlnx-versal: instantiate the GIC ITS in the APU Luc Michel
2025-07-29 20:16   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 24/48] hw/intc/arm_gicv3: Introduce a 'first-cpu-index' property Luc Michel
2025-08-04 12:33   ` Peter Maydell
2025-07-16  9:54 ` [PATCH 25/48] hw/arm/xlnx-versal: add support for multiple GICs Luc Michel
2025-07-30 14:26   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 26/48] hw/arm/xlnx-versal: add support for GICv2 Luc Michel
2025-07-30 14:29   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 27/48] hw/arm/xlnx-versal: rpu: refactor creation Luc Michel
2025-07-30 19:03   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 28/48] hw/arm/xlnx-versal: ocm: " Luc Michel
2025-07-30 19:04   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 29/48] hw/arm/xlnx-versal: ddr: " Luc Michel
2025-07-30 19:12   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 30/48] hw/arm/xlnx-versal: add the versal_get_num_cpu accessor Luc Michel
2025-07-30 19:13   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 31/48] hw/misc/xlnx-versal-crl: remove unnecessary include directives Luc Michel
2025-07-30 19:14   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 32/48] hw/misc/xlnx-versal-crl: split into base/concrete classes Luc Michel
2025-07-30 19:23   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 33/48] hw/misc/xlnx-versal-crl: refactor device reset logic Luc Michel
2025-07-31 13:23   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 34/48] hw/arm/xlnx-versal: reconnect the CRL to the other devices Luc Michel
2025-07-31 13:26   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 35/48] hw/arm/xlnx-versal: use hw/arm/bsa.h for timer IRQ indices Luc Michel
2025-07-31 13:29   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 36/48] hw/arm/xlnx-versal: tidy up Luc Michel
2025-07-31 20:14   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 37/48] hw/misc/xlnx-versal-crl: add the versal2 version Luc Michel
2025-07-31 20:19   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 38/48] hw/arm/xlnx-versal: add a per_cluster_gic switch to VersalCpuClusterMap Luc Michel
2025-07-31 20:27   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 39/48] hw/arm/xlnx-versal: add the target field in IRQ descriptor Luc Michel
2025-07-31 20:31   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 40/48] target/arm/tcg/cpu64: add the cortex-a78ae CPU Luc Michel
2025-08-04 12:44   ` Peter Maydell
2025-08-04 18:44     ` Peter Maydell
2025-07-16  9:54 ` [PATCH 41/48] hw/arm/xlnx-versal: add versal2 SoC Luc Michel
2025-07-31 20:40   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 42/48] hw/arm/xlnx-versal-virt: rename the machine to amd-versal-virt Luc Michel
2025-07-31 20:45   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 43/48] hw/arm/xlnx-versal-virt: split into base/concrete classes Luc Michel
2025-07-31 21:00   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 44/48] hw/arm/xlnx-versal-virt: tidy up Luc Michel
2025-07-31 21:00   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 45/48] docs/system/arm/xlnx-versal-virt: update supported devices Luc Michel
2025-07-31 21:01   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 46/48] docs/system/arm/xlnx-versal-virt: add a note about dumpdtb Luc Michel
2025-07-31 21:02   ` Francisco Iglesias [this message]
2025-07-16  9:54 ` [PATCH 47/48] hw/arm/xlnx-versal-virt: add the xlnx-versal2-virt machine Luc Michel
2025-07-31 21:08   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 48/48] tests/functional/test_aarch64_xlnx_versal: test the versal2 machine Luc Michel
2025-07-31 21:09   ` Francisco Iglesias

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=aIvZ3pFqwFQNwEnH@xse-figlesia-l2.amd.com \
    --to=francisco.iglesias@amd.com \
    --cc=alistair@alistair23.me \
    --cc=edgar.iglesias@amd.com \
    --cc=frederic.konrad@amd.com \
    --cc=luc.michel@amd.com \
    --cc=peter.maydell@linaro.org \
    --cc=philmd@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=sai.pavan.boddu@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).