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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(7416014)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Aug 2025 15:10:04.7356 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1ebb1109-7f41-498c-f4ba-08dde57bcd8e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF0000343D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS5PPF5FAA0E762 Received-SPF: permerror client-ip=2a01:111:f403:2009::623; envelope-from=nicolinc@nvidia.com; helo=NAM10-BN7-obe.outbound.protection.outlook.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FORGED_SPF_HELO=1, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, Aug 27, 2025 at 07:56:38PM +0800, Yi Liu wrote: > On 2025/8/23 07:55, Nicolin Chen wrote: > > > + if (vtd.flags & IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17) { > > > + container->bcontainer.bypass_ro = true; > > > > This circled back to checking a vendor specific flag in the core.. > > > > Perhaps we could upgrade the get_viommu_cap op and its API: > > > > enum viommu_flags { > > VIOMMU_FLAG_HW_NESTED = BIT_ULL(0), > > VIOMMU_FLAG_BYPASS_RO = BIT_ULL(1), > > hmmm. I'm not quite on this idea as the two flags have different sources. > One determined by vIOMMU config, one by the hardware limit. Reporting > them in one API is strange. It's fair enough that we want to make such a clear boundary between a vIOMMU flag and a HW IOMMU flag of the same vendor.. > I think the bypass RO can be determined in > VFIO just like the patch has done. But it should check if vIOMMU has > requested nested hwpt and also the reported hw_info::type is > IOMMU_HW_INFO_TYPE_INTEL_VTD. > > if ((flags & IOMMU_HWPT_ALLOC_NEST_PARENT) && > type == IOMMU_HW_INFO_TYPE_INTEL_VTD && > vtd.flags & IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17) { > container->bcontainer.bypass_ro = true; > } Then, it feels odd to me that we don't have a clear boundary between a generic flag and a vendor flag :-/ It's fine if we want to keep all the host-level vendor flags outside the vIOMMU code, but at least could we please have a generic looking function outside this iommufd_cdev_autodomains_get() to translate a vendor flag to a generic looking flag? We could start with a function that loads the HostIOMMUDeviceCaps (or just VendorCaps) dealing with vendor types and outputs generic ones: host_iommu_flags = host_iommu_decode_vendor_caps(&vendor_caps); if (hwpt_flags & IOMMU_HWPT_ALLOC_NEST_PARENT && host_iommu_flags & HOST_IOMMU_FLAG_BYPASS_RO) { container->bcontainer.bypass_ro = true; } Over time, it can even grow into a separate file, if there are more vendor specific requirement. Nicolin