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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: "Corvin Köhne" <corvin.koehne@gmail.com>
Cc: qemu-devel@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
	"Corvin Köhne" <c.koehne@beckhoff.com>,
	qemu-arm@nongnu.org, "Kevin Wolf" <kwolf@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Yannick Voßen" <y.vossen@beckhoff.com>,
	"Hanna Reitz" <hreitz@redhat.com>,
	qemu-block@nongnu.org
Subject: Re: [PATCH v2 04/14] hw/arm/zynq-devcfg: Prevent unintended unlock during initialization
Date: Sun, 24 Aug 2025 17:47:42 +0200	[thread overview]
Message-ID: <aKs0HvG0OrKwWIhS@zapote> (raw)
In-Reply-To: <20250815090113.141641-5-corvin.koehne@gmail.com>

On Fri, Aug 15, 2025 at 11:01:02AM +0200, Corvin Köhne wrote:
> From: YannickV <Y.Vossen@beckhoff.com>
> 
> During the emulation startup, all registers are reset, which triggers the
> `r_unlock_post_write` function with a value of 0. This led to an
> unintended memory access disable, making the devcfg unusable.
> 
> During startup, the memory space no longer gets locked.
> 
> Signed-off-by: Yannick Voßen <y.vossen@beckhoff.com>

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>



> ---
>  hw/dma/xlnx-zynq-devcfg.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/dma/xlnx-zynq-devcfg.c b/hw/dma/xlnx-zynq-devcfg.c
> index b838c1c0d0..f28d0015e6 100644
> --- a/hw/dma/xlnx-zynq-devcfg.c
> +++ b/hw/dma/xlnx-zynq-devcfg.c
> @@ -221,7 +221,9 @@ static void r_unlock_post_write(RegisterInfo *reg, uint64_t val)
>  {
>      XlnxZynqDevcfg *s = XLNX_ZYNQ_DEVCFG(reg->opaque);
>      const char *device_prefix = object_get_typename(OBJECT(s));
> -
> +    if (device_is_in_reset(DEVICE(s))) {
> +        return;
> +    }
>      if (val == R_UNLOCK_MAGIC) {
>          DB_PRINT("successful unlock\n");
>          s->regs[R_CTRL] |= R_CTRL_PCAP_PR_MASK;
> -- 
> 2.50.1
> 


  reply	other threads:[~2025-08-24 15:48 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-15  9:00 [PATCH v2 00/14] hw/arm: add Beckhoff CX7200 board Corvin Köhne
2025-08-15  9:00 ` [PATCH v2 01/14] hw/timer: Make frequency configurable Corvin Köhne
2025-08-19 16:37   ` Peter Maydell
2025-08-19 16:41   ` Peter Maydell
2025-08-15  9:01 ` [PATCH v2 02/14] hw/timer: Make PERIPHCLK period configurable Corvin Köhne
2025-08-19 16:38   ` Peter Maydell
2025-08-15  9:01 ` [PATCH v2 03/14] hw/dma/zynq-devcfg: Handle bitstream loading via DMA to 0xffffffff Corvin Köhne
2025-08-15  9:01 ` [PATCH v2 04/14] hw/arm/zynq-devcfg: Prevent unintended unlock during initialization Corvin Köhne
2025-08-24 15:47   ` Edgar E. Iglesias [this message]
2025-08-15  9:01 ` [PATCH v2 05/14] hw/dma/zynq: Ensure PCFG_DONE bit remains set to indicate PL is in user mode Corvin Köhne
2025-08-24 16:09   ` Edgar E. Iglesias
2025-08-15  9:01 ` [PATCH v2 06/14] hw/dma/zynq-devcfg: Simulate dummy PL reset Corvin Köhne
2025-08-24 15:53   ` Edgar E. Iglesias
2025-08-15  9:01 ` [PATCH v2 07/14] hw/dma/zynq-devcfg: Indicate power-up status of PL Corvin Köhne
2025-08-24 16:11   ` Edgar E. Iglesias
2025-08-15  9:01 ` [PATCH v2 08/14] hw/dma/zynq-devcfg: Fix register memory Corvin Köhne
2025-08-15  9:01 ` [PATCH v2 09/14] hw/misc: Add dummy ZYNQ DDR controller Corvin Köhne
2025-08-19 15:43   ` Peter Maydell
2025-08-24 16:24     ` Edgar E. Iglesias
2025-08-15  9:01 ` [PATCH v2 10/14] hw/misc/zynq_slcr: Add logic for DCI configuration Corvin Köhne
2025-08-24 16:41   ` Edgar E. Iglesias
2025-08-15  9:01 ` [PATCH v2 11/14] hw/misc: Add Beckhoff CCAT device Corvin Köhne
2025-08-19 16:03   ` Peter Maydell
2025-08-15  9:01 ` [PATCH v2 12/14] hw/block/m25p80: Add HAS_SR_TB flag for is25lp016d Corvin Köhne
2025-08-15  9:01 ` [PATCH v2 13/14] hw/arm: Add new machine based on xilinx-zynq-a9 for Beckhoff CX7200 Corvin Köhne
2025-08-15  9:01 ` [PATCH v2 14/14] docs/system/arm: Add support " Corvin Köhne
2025-08-15 18:06 ` [PATCH v2 00/14] hw/arm: add Beckhoff CX7200 board Peter Maydell
2025-08-19 16:40   ` Peter Maydell
2025-08-24 16:51     ` Edgar E. Iglesias

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