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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(376014)(7416014)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Oct 2025 16:35:18.8817 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f40850b4-55b9-4af3-7850-08de1576d109 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E63.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8503 Received-SPF: permerror client-ip=2a01:111:f403:c107::1; envelope-from=nicolinc@nvidia.com; helo=PH8PR06CU001.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Mon, Oct 27, 2025 at 03:26:15PM +0100, Eric Auger wrote: > On 10/17/25 1:19 AM, Nicolin Chen wrote: > > On Mon, Sep 29, 2025 at 02:36:35PM +0100, Shameer Kolothum wrote: > >> When the guest reboots with devices in nested mode (S1 + S2), any QEMU/UEFI > >> access to those devices can fail because S1 translation is not valid during > >> the reboot. For example, a passthrough NVMe device may hold GRUB boot info > >> that UEFI tries to read during the reboot. > >> > >> Set S1 to bypass mode during reset to avoid such failures. > > GBPA is set to bypass on reset so I think it's fine. Yet, maybe the > > code should check that. > shouldn't we check its actual value before setting bypass? Yes, you are right. GBPA can be changed by the guest. So: "maybe" -> "should" > By the way the spec says is ABORT is set to 0x0: > "Do not abort incoming transactions. Transactions bypass the SMMU with > attributes given by other fields in this register." > > Wondering about those attributes and they can apply on the host? Not at this moment. vSTE only carries: * @ste: The first two double words of the user space Stream Table Entry for * the translation. Must be little-endian. * Allowed fields: (Refer to "5.2 Stream Table Entry" in SMMUv3 HW Spec) * - word-0: V, Cfg, S1Fmt, S1ContextPtr, S1CDMax * - word-1: EATS, S1DSS, S1CIR, S1COR, S1CSH, S1STALLD So, kernel needs to expand the word-1 to support those GBPA fields. I will send a kernel patch this week. Thanks Nicolin