From: Zhao Liu <zhao1.liu@intel.com>
To: Chao Gao <chao.gao@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>,
qemu-devel@nongnu.org, kvm@vger.kernel.org,
John Allen <john.allen@amd.com>, Babu Moger <babu.moger@amd.com>,
Mathias Krause <minipli@grsecurity.net>,
Dapeng Mi <dapeng1.mi@intel.com>, Zide Chen <zide.chen@intel.com>,
Chenyi Qiang <chenyi.qiang@intel.com>,
Xiaoyao Li <xiaoyao.li@intel.com>,
Farrah Chen <farrah.chen@intel.com>
Subject: Re: [PATCH v3 16/20] i386/cpu: Mark cet-u & cet-s xstates as migratable
Date: Fri, 31 Oct 2025 00:09:06 +0800 [thread overview]
Message-ID: <aQONorppI83cWYJK@intel.com> (raw)
In-Reply-To: <aQGvwMTWYPx5FNdQ@intel.com>
On Wed, Oct 29, 2025 at 02:10:08PM +0800, Chao Gao wrote:
> Date: Wed, 29 Oct 2025 14:10:08 +0800
> From: Chao Gao <chao.gao@intel.com>
> Subject: Re: [PATCH v3 16/20] i386/cpu: Mark cet-u & cet-s xstates as
> migratable
>
> On Fri, Oct 24, 2025 at 02:56:28PM +0800, Zhao Liu wrote:
> >Cet-u and cet-s are supervisor xstates. Their states are saved/loaded by
> >saving/loading related CET MSRs. And there's a vmsd "vmstate_cet" to
> >migrate these MSRs.
> >
> >Thus, it's safe to mark them as migratable.
> >
> >Tested-by: Farrah Chen <farrah.chen@intel.com>
> >Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
> >---
> > target/i386/cpu.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> >diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> >index 0bb65e8c5321..c08066a338a3 100644
> >--- a/target/i386/cpu.c
> >+++ b/target/i386/cpu.c
> >@@ -1522,7 +1522,8 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
> > .migratable_flags = XSTATE_FP_MASK | XSTATE_SSE_MASK |
> > XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK |
> > XSTATE_OPMASK_MASK | XSTATE_ZMM_Hi256_MASK | XSTATE_Hi16_ZMM_MASK |
> >- XSTATE_PKRU_MASK | XSTATE_ARCH_LBR_MASK | XSTATE_XTILE_CFG_MASK |
> >+ XSTATE_PKRU_MASK | XSTATE_CET_U_MASK | XSTATE_CET_S_MASK |
> >+ XSTATE_ARCH_LBR_MASK | XSTATE_XTILE_CFG_MASK |
> > XSTATE_XTILE_DATA_MASK,
>
> Supervisor states are enumerated via CPUID[EAX=0xd,ECX=1].ECX/EDX while user
> states are enumerated via CPUID[EAX=0xd,ECX=0].EAX/EDX. So, maybe we need to
> two new feature words?
Yes, I added the mask into wrong place...
Regards,
Zhao
next prev parent reply other threads:[~2025-10-30 15:47 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-24 6:56 [PATCH v3 00/20] i386: Support CET for KVM Zhao Liu
2025-10-24 6:56 ` [PATCH v3 01/20] linux-headers: Update to v6.18-rc2 Zhao Liu
2025-10-24 6:56 ` [PATCH v3 02/20] i386/cpu: Clean up indent style of x86_ext_save_areas[] Zhao Liu
2025-10-27 5:47 ` Xiaoyao Li
2025-10-30 15:11 ` Zhao Liu
2025-10-24 6:56 ` [PATCH v3 03/20] i386/cpu: Clean up arch lbr xsave struct and comment Zhao Liu
2025-10-24 18:20 ` Chen, Zide
2025-10-27 6:08 ` Xiaoyao Li
2025-10-24 6:56 ` [PATCH v3 04/20] i386/cpu: Reorganize arch lbr structure definitions Zhao Liu
2025-10-24 18:20 ` Chen, Zide
2025-10-27 6:22 ` Xiaoyao Li
2025-10-24 6:56 ` [PATCH v3 05/20] i386/cpu: Make ExtSaveArea store an array of dependencies Zhao Liu
2025-10-27 7:04 ` Xiaoyao Li
2025-10-27 10:09 ` Zhao Liu
2025-10-24 6:56 ` [PATCH v3 06/20] i386/cpu: Add avx10 dependency for Opmask/ZMM_Hi256/Hi16_ZMM Zhao Liu
2025-10-27 7:05 ` Xiaoyao Li
2025-10-24 6:56 ` [PATCH v3 07/20] i386/cpu: Reorganize dependency check for arch lbr state Zhao Liu
2025-10-24 18:21 ` Chen, Zide
2025-10-27 7:40 ` Xiaoyao Li
2025-10-27 10:12 ` Zhao Liu
2025-10-27 11:15 ` Xiaoyao Li
2025-10-30 15:40 ` Zhao Liu
2025-10-24 6:56 ` [PATCH v3 08/20] i386/cpu: Drop pmu check in CPUID 0x1C encoding Zhao Liu
2025-10-24 18:21 ` Chen, Zide
2025-10-27 7:51 ` Xiaoyao Li
2025-10-27 11:01 ` Zhao Liu
2025-10-24 6:56 ` [PATCH v3 09/20] i386/cpu: Fix supervisor xstate initialization Zhao Liu
2025-10-27 7:55 ` Xiaoyao Li
2025-10-27 10:13 ` Zhao Liu
2025-10-24 6:56 ` [PATCH v3 10/20] i386/cpu: Add missing migratable xsave features Zhao Liu
2025-10-27 8:42 ` Xiaoyao Li
2025-10-27 10:19 ` Zhao Liu
2025-10-27 11:18 ` Zhao Liu
2025-10-27 12:02 ` Xiaoyao Li
2025-10-30 15:56 ` Zhao Liu
2025-11-05 10:39 ` Xiaoyao Li
2025-10-27 11:36 ` Zhao Liu
2025-10-24 6:56 ` [PATCH v3 11/20] i386/cpu: Enable xsave support for CET states Zhao Liu
2025-10-28 8:00 ` Xiaoyao Li
2025-10-29 4:58 ` Chao Gao
2025-10-30 4:29 ` Xiaoyao Li
2025-10-30 16:39 ` Zhao Liu
2025-10-24 6:56 ` [PATCH v3 12/20] i386/cpu: Add CET support in CR4 Zhao Liu
2025-10-28 2:04 ` Chenyi Qiang
2025-10-30 15:57 ` Zhao Liu
2025-10-24 6:56 ` [PATCH v3 13/20] i386/kvm: Add save/load support for CET MSRs Zhao Liu
2025-10-24 6:56 ` [PATCH v3 14/20] i386/kvm: Add save/load support for KVM_REG_GUEST_SSP Zhao Liu
2025-10-28 8:21 ` Xiaoyao Li
2025-10-24 6:56 ` [PATCH v3 15/20] i386/machine: Add vmstate for cet-ss and cet-ibt Zhao Liu
2025-10-28 8:29 ` Xiaoyao Li
2025-10-30 16:04 ` Zhao Liu
2025-11-05 10:41 ` Xiaoyao Li
2025-10-24 6:56 ` [PATCH v3 16/20] i386/cpu: Mark cet-u & cet-s xstates as migratable Zhao Liu
2025-10-27 11:34 ` Zhao Liu
2025-10-29 6:13 ` Chao Gao
2025-10-29 6:10 ` Chao Gao
2025-10-30 16:09 ` Zhao Liu [this message]
2025-10-24 6:56 ` [PATCH v3 17/20] i386/cpu: Advertise CET related flags in feature words Zhao Liu
2025-10-28 8:33 ` Xiaoyao Li
2025-10-24 6:56 ` [PATCH v3 18/20] i386/cpu: Enable cet-ss & cet-ibt for supported CPU models Zhao Liu
2025-10-28 8:34 ` Xiaoyao Li
2025-10-24 6:56 ` [PATCH v3 19/20] i386/tdx: Fix missing spaces in tdx_xfam_deps[] Zhao Liu
2025-10-28 8:37 ` Xiaoyao Li
2025-10-24 6:56 ` [PATCH v3 20/20] i386/tdx: Add CET SHSTK/IBT into the supported CPUID by XFAM Zhao Liu
2025-10-28 8:55 ` Xiaoyao Li
2025-10-30 16:07 ` Zhao Liu
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