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Thu, 13 Nov 2025 09:44:08 -0800 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail202.nvidia.com (10.129.68.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 13 Nov 2025 09:44:07 -0800 Received: from Asurada-Nvidia (10.127.8.11) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Thu, 13 Nov 2025 09:44:06 -0800 Date: Thu, 13 Nov 2025 09:44:05 -0800 From: Nicolin Chen To: Shameer Kolothum CC: Zhangfei Gao , "qemu-arm@nongnu.org" , "qemu-devel@nongnu.org" , "eric.auger@redhat.com" , "peter.maydell@linaro.org" , Nathan Chen , Matt Ochs , "jonathan.cameron@huawei.com" , "zhenzhong.duan@intel.com" , Jason Gunthorpe , "Krishnakant Jaju" Subject: Re: [RFC PATCH 4/4] hw/arm/smmuv3-accel: Read and propagate host vIOMMU events Message-ID: References: <20251105154657.37386-1-skolothumtho@nvidia.com> <20251105154657.37386-5-skolothumtho@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(82310400026)(36860700013)(376014)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 17:44:24.3140 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8731279d-4c82-4ca2-e1e2-08de22dc48ec X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A348.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8891 Received-SPF: permerror client-ip=2a01:111:f403:c107::1; envelope-from=nicolinc@nvidia.com; helo=PH8PR06CU001.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Thu, Nov 13, 2025 at 05:07:50AM -0800, Shameer Kolothum wrote: > > On Wed, 5 Nov 2025 at 23:49, Shameer Kolothum > > wrote: > > > > > > Install an event handler on the vEVENTQ fd to read and propagate host > > > generated vIOMMU events to the guest. > > > > > > The handler runs in QEMU’s main loop, using a non-blocking fd registered > > > via qemu_set_fd_handler(). > > > > > > Signed-off-by: Shameer Kolothum > > > > Still don't understand how to use this vevent. > > Is it to replace the fault queue (IOMMU_FAULT_QUEUE_ALLOC)? > > No. IIUC, IOMMU_FAULT_QUEUE_ALLOC is to handle I/O page faults > for any HWPT capable of handling page faults/response. The QEMU > SMMUv3 still don't support page fault handling. > > The VEVENTQ, on the other hand, provides a way to report any > other s1 events to Guest. > > See how events are reported in arm_smmu_handle_event(): > > if (event->stall) > ret = iommu_report_device_fault(master->dev, &fault_evt); //Page faults > else if (master->vmaster && !event->s2) > ret = arm_vmaster_report_event(master->vmaster, evt); //This series handles this case. > else > ret = -EOPNOTSUPP; Yes. We can say that FAULT_QUEUE is exclusively for PRI while the vEVENTQ is for other types of HW events (or IRQs) related to the guest stage-1. They can be used together. > > And only find read, no write, only receive events but no response > > (from guest kernel)? > > Yes. And I am not sure what the long term plan is. We can still use > IOMMU_FAULT_QUEUE_ALLOC for page fault handling or extend this > VEVENTQ to have write() support for responses > > To me, from an implementation perspective, both this FAULT and > VEVENTQ look almost similar. > > @Nicolin, any idea what's plan for page fault handling? No. I think PRI should be done via FAULT_QUEUE. > > By the way, can we use vevent in user space application? not in qemu > > environment. > > I didn't get that. Qemu is userspace. Or you meant just to receive any events > from host SMMUv3 in user spacel? If user space application follows the iommufd uAPI like QEMU does, it can. I am not sure about the use case though. Nicolin