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From: Magnus Kulke <magnuskulke@linux.microsoft.com>
To: Bernhard Beschow <shentey@gmail.com>
Cc: qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PULL 28/35] target/i386/mshv: Implement mshv_vcpu_run()
Date: Tue, 25 Nov 2025 12:25:22 +0100	[thread overview]
Message-ID: <aSWSIoUUOXy1nxpY@example.com> (raw)
In-Reply-To: <CFB6B222-C2AF-4D3F-AFF1-F68BFCA7489B@gmail.com>

On Sun, Nov 09, 2025 at 01:10:50PM +0000, Bernhard Beschow wrote:
> >+static int read_memory(const CPUState *cpu, uint64_t initial_gva,
> >+                       uint64_t initial_gpa, uint64_t gva, uint8_t *data,
> >+                       size_t len)
> >+{
> >+    int ret;
> >+    uint64_t gpa, flags;
> >+
> >+    if (gva == initial_gva) {
> >+        gpa = initial_gpa;
> 
> This assignment is never read and this branch leaves `data` untouched...
> 
> >+    } else {
> >+        flags = HV_TRANSLATE_GVA_VALIDATE_READ;
> >+        ret = translate_gva(cpu, gva, &gpa, flags);
> >+        if (ret < 0) {
> >+            return -1;
> >+        }
> >+
> 
> while this block:
> 
> >+        ret = mshv_guest_mem_read(gpa, data, len, false, false);
> >+        if (ret < 0) {
> >+            error_report("failed to read guest mem");
> >+            return -1;
> >+        }
> 
> is only executed in the else branch which is inconsistent to write_memory(). Is that intended? If so, do we really need the unused assignment above?
> 
> Best regards,
> Bernhard
> 

Thank you for spotting this Bernhard, this is a remnant from an attempt
to optimize gva=>gpa translations, but currently it's dead code. I'll
send a patch.

best,

magnus


  reply	other threads:[~2025-11-25 11:26 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-09  7:49 [PULL 00/35] i386 (MSHV, migration) and Rust changes for 2025-10-09 Paolo Bonzini
2025-10-09  7:49 ` [PULL 01/35] subprojects: Remove version number from .gitignore Paolo Bonzini
2025-10-09  7:49 ` [PULL 02/35] subprojects: add glib-sys-rs Paolo Bonzini
2025-10-09  7:49 ` [PULL 03/35] rust: use glib-sys Paolo Bonzini
2025-10-09  7:49 ` [PULL 04/35] build-sys: default to host vendor for rust target triple Paolo Bonzini
2025-10-09  7:49 ` [PULL 05/35] target/i386: add compatibility property for arch_capabilities Paolo Bonzini
2025-10-09  7:49 ` [PULL 06/35] target/i386: add compatibility property for pdcm feature Paolo Bonzini
2025-10-09  7:49 ` [PULL 07/35] accel: Add Meson and config support for MSHV accelerator Paolo Bonzini
2025-10-09  7:49 ` [PULL 08/35] target/i386/emulate: Allow instruction decoding from stream Paolo Bonzini
2025-10-09  7:49 ` [PULL 09/35] target/i386/mshv: Add x86 decoder/emu implementation Paolo Bonzini
2025-10-09  7:50 ` [PULL 10/35] hw/intc: Generalize APIC helper names from kvm_* to accel_* Paolo Bonzini
2025-11-03 21:43   ` Cédric Le Goater
2025-11-05 15:24     ` Magnus Kulke
2025-11-06 10:51       ` Cédric Le Goater
2025-10-09  7:50 ` [PULL 11/35] include/hw/hyperv: Add MSHV ABI header definitions Paolo Bonzini
2025-10-09  7:50 ` [PULL 12/35] linux-headers/linux: Add mshv.h headers Paolo Bonzini
2025-10-09  7:50 ` [PULL 13/35] accel/mshv: Add accelerator skeleton Paolo Bonzini
2025-10-09  7:50 ` [PULL 14/35] accel/mshv: Register memory region listeners Paolo Bonzini
2025-10-09  7:50 ` [PULL 15/35] accel/mshv: Initialize VM partition Paolo Bonzini
2025-10-09  7:50 ` [PULL 16/35] accel/mshv: Add vCPU creation and execution loop Paolo Bonzini
2025-10-21 15:48   ` Peter Maydell
2025-10-09  7:50 ` [PULL 17/35] accel/mshv: Add vCPU signal handling Paolo Bonzini
2025-10-09  7:50 ` [PULL 18/35] target/i386/mshv: Add CPU create and remove logic Paolo Bonzini
2025-10-09  7:50 ` [PULL 19/35] target/i386/mshv: Implement mshv_store_regs() Paolo Bonzini
2025-10-09  7:50 ` [PULL 20/35] target/i386/mshv: Implement mshv_get_standard_regs() Paolo Bonzini
2025-10-09  7:50 ` [PULL 21/35] target/i386/mshv: Implement mshv_get_special_regs() Paolo Bonzini
2025-10-09  7:50 ` [PULL 22/35] target/i386/mshv: Implement mshv_arch_put_registers() Paolo Bonzini
2025-10-09  7:50 ` [PULL 23/35] target/i386/mshv: Set local interrupt controller state Paolo Bonzini
2025-10-09  7:50 ` [PULL 24/35] target/i386/mshv: Register CPUID entries with MSHV Paolo Bonzini
2025-10-09  7:50 ` [PULL 25/35] target/i386/mshv: Register MSRs " Paolo Bonzini
2025-10-09  7:50 ` [PULL 26/35] target/i386/mshv: Integrate x86 instruction decoder/emulator Paolo Bonzini
2025-10-09  7:50 ` [PULL 27/35] target/i386/mshv: Write MSRs to the hypervisor Paolo Bonzini
2025-10-09  7:50 ` [PULL 28/35] target/i386/mshv: Implement mshv_vcpu_run() Paolo Bonzini
2025-10-21 15:27   ` Peter Maydell
2025-11-09 13:10   ` Bernhard Beschow
2025-11-25 11:25     ` Magnus Kulke [this message]
2025-10-09  7:50 ` [PULL 29/35] accel/mshv: Handle overlapping mem mappings Paolo Bonzini
2025-10-09  7:50 ` [PULL 30/35] qapi/accel: Allow to query mshv capabilities Paolo Bonzini
2025-10-09  7:50 ` [PULL 31/35] target/i386/mshv: Use preallocated page for hvcall Paolo Bonzini
2025-10-09  7:50 ` [PULL 32/35] docs: Add mshv to documentation Paolo Bonzini
2025-10-09  7:50 ` [PULL 33/35] MAINTAINERS: Add maintainers for mshv accelerator Paolo Bonzini
2025-10-09  7:50 ` [PULL 34/35] tests/docker: make --enable-rust overridable with EXTRA_CONFIGURE_OPTS Paolo Bonzini
2025-10-09  7:50 ` [PULL 35/35] rust: fix path to rust_root_crate.sh Paolo Bonzini
2025-10-09 16:23 ` [PULL 00/35] i386 (MSHV, migration) and Rust changes for 2025-10-09 Richard Henderson

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