From: Jessica Clarke <jrtc27@jrtc27.com>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: qemu-devel@nongnu.org, Peter Maydell <peter.maydell@linaro.org>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>
Subject: Re: [PATCH v3] target/arm: handle unaligned PC during tlb probe
Date: Fri, 5 Dec 2025 01:28:53 +0000 [thread overview]
Message-ID: <aTI1VZHxicpycoLj@Jessicas-MacBook-Pro> (raw)
In-Reply-To: <20251204203540.1381896-1-alex.bennee@linaro.org>
On Thu, Dec 04, 2025 at 08:35:40PM +0000, Alex Bennée wrote:
> PC alignment faults have priority over instruction aborts and we have
> code to deal with this in the translation front-ends. However during
> tb_lookup we can see a potentially faulting probe which doesn't get a
> MemOp set. If the page isn't available this results in
> EC_INSNABORT (0x20) instead of EC_PCALIGNMENT (0x22).
>
> As there is no easy way to set the appropriate MemOp in the
> instruction fetch probe path lets just detect it in
> arm_cpu_tlb_fill_align() ahead of the main alignment check. We also
> teach arm_deliver_fault to deliver the right syndrome for
> MMU_INST_FETCH alignment issues.
>
> Fixes: https://gitlab.com/qemu-project/qemu/-/issues/3233
> Tested-by: Jessica Clarke <jrtc27@jrtc27.com>
v3 is different enough from the tested RFC that maybe this shouldn't
have been carried forwards, but I've now tested this v3 and it does
indeed still fix the issue in my testing.
Thanks,
Jessica
next prev parent reply other threads:[~2025-12-05 1:29 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-04 20:35 [PATCH v3] target/arm: handle unaligned PC during tlb probe Alex Bennée
2025-12-05 1:28 ` Jessica Clarke [this message]
2025-12-05 9:28 ` Alex Bennée
2025-12-05 15:11 ` Richard Henderson
2025-12-10 10:14 ` Michael Tokarev
2025-12-10 11:00 ` Alex Bennée
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