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From: Stafford Horne <shorne@gmail.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: Richard Henderson <richard.henderson@linaro.org>,
	Joel Stanley <joel@jms.id.au>,
	QEMU Development <qemu-devel@nongnu.org>,
	"Jason A. Donenfeld" <Jason@zx2c4.com>,
	Openrisc <openrisc@lists.librecores.org>
Subject: Re: [RFC PATCH 3/3] hw/openrisc: Add the OpenRISC virtual machine
Date: Thu, 11 Dec 2025 08:05:53 +0000	[thread overview]
Message-ID: <aTp7YW43nxdqDOAT@antec> (raw)
In-Reply-To: <36365615-9e43-4ce5-a1ba-e495eacb1f24@linaro.org>

On Wed, Dec 10, 2025 at 06:22:58AM +0100, Philippe Mathieu-Daudé wrote:
> On 2/6/22 17:49, Richard Henderson wrote:
> > On 6/2/22 04:42, Joel Stanley wrote:
> > > Hi Stafford,
> > > 
> > > On Fri, 27 May 2022 at 17:27, Stafford Horne <shorne@gmail.com> wrote:
> > > > 
> > > > This patch add the OpenRISC virtual machine 'virt' for OpenRISC.  This
> > > > platform allows for a convenient CI platform for toolchain, software
> > > > ports and the OpenRISC linux kernel port.
> > > > 
> > > > Much of this has been sourced from the m68k and riscv virt platforms.
> > > 
> > > It's a good idea! I did some playing around with your patch today.
> > > 
> > > I'd suggest adding something to docs/system/target-openrsic.rst,
> > > including an example command lines.
> > > 
> > > > 
> > > > The platform provides:
> > > >   - OpenRISC SMP with up to 8 cpus
> > > 
> > > You have this:
> > > 
> > > #define VIRT_CPUS_MAX 4
> > > 
> > > I tried booting with -smp 4 and it locked up when starting userspace
> > > (or I stopped getting serial output?):
> > > 
> > > [    0.060000] smp: Brought up 1 node, 4 CPUs
> > > ...
> > > [    0.960000] Run /init as init process
> > > 
> > > Running with -smp 2 and 3 worked. It does make booting much much slower.
> > 
> > target/openrisc/cpu.h is missing
> > 
> > #define TCG_GUEST_DEFAULT_MO      (0)
> > 
> > 
> > to tell the JIT about the weakly ordered guest memory model, and to
> > enable MTTCG by default.
> > 
> > > I enabled the options:
> > > 
> > > CONFIG_RTC_CLASS=y
> > > # CONFIG_RTC_SYSTOHC is not set
> > > # CONFIG_RTC_NVMEM is not set
> > > CONFIG_RTC_DRV_GOLDFISH=y
> > > 
> > > But it didn't work. It seems the goldfish rtc model doesn't handle a
> > > big endian guest running on my little endian host.
> > > 
> > > Doing this fixes it:
> > > 
> > > -    .endianness = DEVICE_NATIVE_ENDIAN,
> > > +    .endianness = DEVICE_HOST_ENDIAN,
> > > 
> > > [    0.190000] goldfish_rtc 96005000.rtc: registered as rtc0
> > > [    0.190000] goldfish_rtc 96005000.rtc: setting system clock to
> > > 2022-06-02T11:16:04 UTC (1654168564)
> > > 
> > > But literally no other model in the tree does this, so I suspect it's
> > > not the right fix.
> > 
> > Correct.  The model might require
> > 
> >      .endianness = DEVICE_LITTLE_ENDIAN,
> > 
> > if that is the actual specification, or it may simply require fixes to
> > handle a big-endian guest.
> > 
> > All that said, if we're going to make up a new virt platform, it should
> > use PCI not virtio.  See the recent discussion about RISC-V virtual
> > machines, where they made exactly this mistake several years ago.
> 
> Unfortunately this precious remark was missed :(

Which part of it?  I think I took this comment into consideration and switched
OpenRISC virt from virtio to PCI.  But regarding endianness I did what I could.

-Stafford


  reply	other threads:[~2025-12-11  8:06 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-27 17:27 [RFC PATCH 0/3] OpenRISC Semihosting and Virt Stafford Horne
2022-05-27 17:27 ` [RFC PATCH 1/3] target/openrisc: Add basic support for semihosting Stafford Horne
2022-06-02 15:39   ` Richard Henderson
2022-06-05  0:57     ` Stafford Horne
2022-06-05 14:36       ` Richard Henderson
2022-05-27 17:27 ` [RFC PATCH 2/3] hw/openrisc: Split re-usable boot time apis out to boot.c Stafford Horne
2022-06-02 15:40   ` Richard Henderson
2022-05-27 17:27 ` [RFC PATCH 3/3] hw/openrisc: Add the OpenRISC virtual machine Stafford Horne
2022-06-02 11:42   ` Joel Stanley
2022-06-02 15:49     ` Richard Henderson
2025-12-10  5:22       ` Philippe Mathieu-Daudé
2025-12-11  8:05         ` Stafford Horne [this message]
2022-06-02 19:08     ` Geert Uytterhoeven
2022-06-02 19:59       ` Stafford Horne
2022-06-03  7:05         ` Geert Uytterhoeven
2022-06-05  1:58           ` Stafford Horne
2022-06-05  7:32             ` Stafford Horne
2022-06-05  8:19               ` Jason A. Donenfeld
2022-06-07  9:48                 ` Jason A. Donenfeld
2022-06-07  8:11               ` Geert Uytterhoeven
2022-06-07  8:42                 ` Arnd Bergmann
2022-06-07  9:47                   ` Stafford Horne
2022-06-07 10:04                     ` Arnd Bergmann
2022-06-07 10:43                     ` Peter Maydell
2022-06-07 12:12                       ` Stafford Horne
2022-06-07 14:08                         ` Arnd Bergmann
2025-12-10  5:22                           ` Philippe Mathieu-Daudé
2025-12-11  8:08                             ` Stafford Horne
2022-06-05  2:36     ` Stafford Horne

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