From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: "Cédric Le Goater" <clg@kaod.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Joel Stanley" <joel@jms.id.au>,
"Alistair Francis" <alistair@alistair23.me>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
qemu-block@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>
Subject: Re: [PULL 03/16] ssi: cache SSIPeripheralClass to avoid GET_CLASS()
Date: Fri, 12 May 2023 06:02:48 +0200 [thread overview]
Message-ID: <aa83095b-64f5-584f-8ccc-0e1f6f2e6ae3@linaro.org> (raw)
In-Reply-To: <20221025152042.278287-4-clg@kaod.org>
Hi Alex,
On 25/10/22 17:20, Cédric Le Goater wrote:
> From: Alex Bennée <alex.bennee@linaro.org>
>
> Investigating why some BMC models are so slow compared to a plain ARM
> virt machines I did some profiling of:
>
> ./qemu-system-arm -M romulus-bmc -nic user \
> -drive
> file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd \
> -nographic -serial mon:stdio
>
> And saw that object_class_dynamic_cast_assert was dominating the
> profile times. We have a number of cases in this model of the SSI bus.
> As the class is static once the object is created we just cache it and
> use it instead of the dynamic case macros.
>
> Profiling against:
>
> ./tests/venv/bin/avocado run \
> tests/avocado/machine_aspeed.py:test_arm_ast2500_romulus_openbmc_v2_9_0
>
> Before: 35.565 s ± 0.087 s
> After: 15.713 s ± 0.287 s
Do you remember if you were using --enable-qom-cast-debug when
profiling this?
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Cc: Cédric Le Goater <clg@kaod.org>
> Tested-by: Cédric Le Goater <clg@kaod.org>
> Reviewed-by: Cédric Le Goater <clg@kaod.org>
> Message-Id: <20220811151413.3350684-6-alex.bennee@linaro.org>
> Message-Id: <20220923084803.498337-6-clg@kaod.org>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
> include/hw/ssi/ssi.h | 3 +++
> hw/ssi/ssi.c | 18 ++++++++----------
> 2 files changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h
> index f411858ab083..6950f86810d3 100644
> --- a/include/hw/ssi/ssi.h
> +++ b/include/hw/ssi/ssi.h
> @@ -59,6 +59,9 @@ struct SSIPeripheralClass {
> struct SSIPeripheral {
> DeviceState parent_obj;
>
> + /* cache the class */
> + SSIPeripheralClass *spc;
> +
> /* Chip select state */
> bool cs;
> };
> diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c
> index 003931fb509e..d54a109beeb5 100644
> --- a/hw/ssi/ssi.c
> +++ b/hw/ssi/ssi.c
> @@ -38,9 +38,8 @@ static void ssi_cs_default(void *opaque, int n, int level)
> bool cs = !!level;
> assert(n == 0);
> if (s->cs != cs) {
> - SSIPeripheralClass *ssc = SSI_PERIPHERAL_GET_CLASS(s);
> - if (ssc->set_cs) {
> - ssc->set_cs(s, cs);
> + if (s->spc->set_cs) {
> + s->spc->set_cs(s, cs);
> }
> }
> s->cs = cs;
> @@ -48,11 +47,11 @@ static void ssi_cs_default(void *opaque, int n, int level)
>
> static uint32_t ssi_transfer_raw_default(SSIPeripheral *dev, uint32_t val)
> {
> - SSIPeripheralClass *ssc = SSI_PERIPHERAL_GET_CLASS(dev);
> + SSIPeripheralClass *ssc = dev->spc;
>
> if ((dev->cs && ssc->cs_polarity == SSI_CS_HIGH) ||
> - (!dev->cs && ssc->cs_polarity == SSI_CS_LOW) ||
> - ssc->cs_polarity == SSI_CS_NONE) {
> + (!dev->cs && ssc->cs_polarity == SSI_CS_LOW) ||
> + ssc->cs_polarity == SSI_CS_NONE) {
> return ssc->transfer(dev, val);
> }
> return 0;
> @@ -67,6 +66,7 @@ static void ssi_peripheral_realize(DeviceState *dev, Error **errp)
> ssc->cs_polarity != SSI_CS_NONE) {
> qdev_init_gpio_in_named(dev, ssi_cs_default, SSI_GPIO_CS, 1);
> }
> + s->spc = ssc;
>
> ssc->realize(s, errp);
> }
> @@ -115,13 +115,11 @@ uint32_t ssi_transfer(SSIBus *bus, uint32_t val)
> {
> BusState *b = BUS(bus);
> BusChild *kid;
> - SSIPeripheralClass *ssc;
> uint32_t r = 0;
>
> QTAILQ_FOREACH(kid, &b->children, sibling) {
> - SSIPeripheral *peripheral = SSI_PERIPHERAL(kid->child);
> - ssc = SSI_PERIPHERAL_GET_CLASS(peripheral);
> - r |= ssc->transfer_raw(peripheral, val);
> + SSIPeripheral *p = SSI_PERIPHERAL(kid->child);
> + r |= p->spc->transfer_raw(p, val);
> }
>
> return r;
next prev parent reply other threads:[~2023-05-12 4:03 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-25 15:20 [PULL 00/16] aspeed queue Cédric Le Goater
2022-10-25 15:20 ` [PULL 01/16] hw/i2c/aspeed: Fix old reg slave receive Cédric Le Goater
2022-10-25 15:20 ` [PULL 02/16] tests/avocado/machine_aspeed.py: Fix typos on buildroot Cédric Le Goater
2022-10-25 15:20 ` [PULL 03/16] ssi: cache SSIPeripheralClass to avoid GET_CLASS() Cédric Le Goater
2023-05-12 4:02 ` Philippe Mathieu-Daudé [this message]
2022-10-25 15:20 ` [PULL 04/16] aspeed/smc: Cache AspeedSMCClass Cédric Le Goater
2023-05-12 4:00 ` Philippe Mathieu-Daudé
2023-05-12 7:06 ` Cédric Le Goater
2022-10-25 15:20 ` [PULL 05/16] ast2600: Drop NEON from the CPU features Cédric Le Goater
2022-10-25 15:20 ` [PULL 06/16] hw/arm/aspeed: increase Bletchley memory size Cédric Le Goater
2022-10-25 15:20 ` [PULL 07/16] m25p80: Add basic support for the SFDP command Cédric Le Goater
2022-10-25 15:20 ` [PULL 08/16] m25p80: Add the n25q256a SFDP table Cédric Le Goater
2022-10-25 15:20 ` [PULL 09/16] m25p80: Add erase size for mx25l25635e Cédric Le Goater
2022-10-25 15:20 ` [PULL 10/16] m25p80: Add the mx25l25635e SFPD table Cédric Le Goater
2022-10-25 15:20 ` [PULL 11/16] m25p80: Add the mx25l25635f " Cédric Le Goater
2022-10-25 15:20 ` [PULL 12/16] m25p80: Add the mx66l1g45g SFDP table Cédric Le Goater
2022-10-25 15:20 ` [PULL 13/16] m25p80: Add the w25q256 SFPD table Cédric Le Goater
2022-10-25 15:20 ` [PULL 14/16] m25p80: Add the w25q512jv " Cédric Le Goater
2022-10-25 15:20 ` [PULL 15/16] m25p80: Add the w25q01jvq " Cédric Le Goater
2022-10-25 15:20 ` [PULL 16/16] arm/aspeed: Replace mx25l25635e chip model Cédric Le Goater
2022-10-26 18:54 ` [PULL 00/16] aspeed queue Stefan Hajnoczi
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