From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: Re: [PATCH 01/12] target/tricore: Remove target_ulong use in gen_goto_tb()
Date: Fri, 10 Oct 2025 09:56:32 -0700 [thread overview]
Message-ID: <aaf9e7ec-04ec-4eae-b107-fe1053823bfe@linaro.org> (raw)
In-Reply-To: <20251010052141.42460-2-philmd@linaro.org>
On 10/9/25 22:21, Philippe Mathieu-Daudé wrote:
> translator_use_goto_tb() expects a vaddr type since commit
> b1c09220b4c ("accel/tcg: Replace target_ulong with vaddr in
> translator_*()").
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/tricore/translate.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/target/tricore/translate.c b/target/tricore/translate.c
> index 7c6e3095971..dd09f0651f5 100644
> --- a/target/tricore/translate.c
> +++ b/target/tricore/translate.c
> @@ -72,7 +72,8 @@ static const char *regnames_d[] = {
>
> typedef struct DisasContext {
> DisasContextBase base;
> - target_ulong pc_succ_insn;
> +
> + vaddr pc_succ_insn;
> uint32_t opcode;
> /* Routine used to access memory */
> int mem_idx;
> @@ -2811,13 +2812,12 @@ static void gen_calc_usb_mulr_h(TCGv arg)
>
> /* helpers for generating program flow micro-ops */
>
> -static inline void gen_save_pc(target_ulong pc)
> +static inline void gen_save_pc(vaddr pc)
> {
> tcg_gen_movi_tl(cpu_PC, pc);
> }
>
> -static void gen_goto_tb(DisasContext *ctx, unsigned tb_slot_index,
> - target_ulong dest)
> +static void gen_goto_tb(DisasContext *ctx, unsigned tb_slot_index, vaddr dest)
> {
> if (translator_use_goto_tb(&ctx->base, dest)) {
> tcg_gen_goto_tb(tb_slot_index);
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2025-10-10 16:58 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-10 5:21 [PATCH 00/12] target/tricore: Remove all uses of target_ulong types Philippe Mathieu-Daudé
2025-10-10 5:21 ` [PATCH 01/12] target/tricore: Remove target_ulong use in gen_goto_tb() Philippe Mathieu-Daudé
2025-10-10 16:56 ` Richard Henderson [this message]
2025-10-10 5:21 ` [PATCH 02/12] target/tricore: Replace target_ulong -> vaddr with tlb_fill() callees Philippe Mathieu-Daudé
2025-10-10 16:56 ` Richard Henderson
2025-10-10 5:21 ` [PATCH 03/12] target/tricore: Remove target_ulong use in translate_insn() handler Philippe Mathieu-Daudé
2025-10-10 16:57 ` Richard Henderson
2025-10-10 5:21 ` [PATCH 04/12] target/tricore: Remove target_ulong use in gen_addi_d() Philippe Mathieu-Daudé
2025-10-10 16:59 ` Richard Henderson
2025-10-10 5:21 ` [PATCH 05/12] target/tricore: Remove unnecessary cast to target_ulong Philippe Mathieu-Daudé
2025-10-10 16:59 ` Richard Henderson
2025-10-10 5:21 ` [PATCH 06/12] target/tricore: Replace target_ulong -> uint32_t in op_helper.c Philippe Mathieu-Daudé
2025-10-10 17:01 ` Richard Henderson
2025-10-10 5:21 ` [PATCH 07/12] target/tricore: Declare registers as TCGv_i32 Philippe Mathieu-Daudé
2025-10-10 17:04 ` Richard Henderson
2025-10-10 5:21 ` [PATCH 08/12] target/tricore: Inline tcg_gen_ld32u_tl() Philippe Mathieu-Daudé
2025-10-10 17:05 ` Richard Henderson
2025-10-10 5:21 ` [PATCH 09/12] target/tricore: Expand TCG helpers for 32-bit target Philippe Mathieu-Daudé
2025-10-10 17:06 ` Richard Henderson
2025-10-10 5:21 ` [PATCH 10/12] target/tricore: Pass DisasContext as first argument Philippe Mathieu-Daudé
2025-10-10 17:07 ` Richard Henderson
2025-10-10 5:21 ` [PATCH 11/12] target/tricore: Un-inline various helpers Philippe Mathieu-Daudé
2025-10-10 17:07 ` Richard Henderson
2025-10-10 5:21 ` [PATCH 12/12] target/tricore: Expand TCGv type for 32-bit target Philippe Mathieu-Daudé
2025-10-10 17:09 ` Richard Henderson
2025-10-15 16:55 ` [PATCH 00/12] target/tricore: Remove all uses of target_ulong types Philippe Mathieu-Daudé
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