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Sat, 03 May 2025 15:38:57 -0700 (PDT) Received: from [192.168.1.87] ([38.41.223.211]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-74058d7aea7sm3875921b3a.8.2025.05.03.15.38.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 03 May 2025 15:38:56 -0700 (PDT) Message-ID: Date: Sat, 3 May 2025 15:38:56 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 30/33] target/arm/ptw: remove TARGET_AARCH64 from arm_casq_ptw Content-Language: en-US To: Richard Henderson , qemu-devel@nongnu.org Cc: Peter Maydell , qemu-arm@nongnu.org, alex.bennee@linaro.org, Paolo Bonzini , anjo@rev.ng, =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , kvm@vger.kernel.org References: <20250501062344.2526061-1-pierrick.bouvier@linaro.org> <20250501062344.2526061-31-pierrick.bouvier@linaro.org> From: Pierrick Bouvier In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 5/1/25 9:24 AM, Richard Henderson wrote: > On 4/30/25 23:23, Pierrick Bouvier wrote: >> Signed-off-by: Pierrick Bouvier >> --- >> target/arm/ptw.c | 13 ++++++++----- >> 1 file changed, 8 insertions(+), 5 deletions(-) >> >> diff --git a/target/arm/ptw.c b/target/arm/ptw.c >> index 424d1b54275..f428c9b9267 100644 >> --- a/target/arm/ptw.c >> +++ b/target/arm/ptw.c >> @@ -737,7 +737,14 @@ static uint64_t arm_casq_ptw(CPUARMState *env, uint64_t old_val, >> uint64_t new_val, S1Translate *ptw, >> ARMMMUFaultInfo *fi) >> { >> -#if defined(TARGET_AARCH64) && defined(CONFIG_TCG) >> +#ifndef CONFIG_TCG >> + /* non-TCG guests only use debug-mode. */ >> + g_assert_not_reached(); >> +#endif >> + >> + /* AArch32 does not have FEAT_HADFS */ >> + g_assert(arm_feature(env, ARM_FEATURE_AARCH64)); >> + > > I don't think we need an assert here. > > The ifdef for aarch64 also protects the qatomic_cmpxchg__nocheck below, because aarch64 > guest can only be built with a 64-bit host. > > Are we still able to build qemu-system-arm on a 32-bit host with these changes? It may be > tricky to check, because the two easiest 32-bit hosts (i686, armv7) also happen to have a > 64-bit cmpxchg. I think "make docker-test-build@debian-mipsel-cross" will be the right test. > Good catch. I was indeed building only with i686. I'll add mipsel instead. /usr/lib/gcc-cross/mipsel-linux-gnu/12/../../../../mipsel-linux-gnu/bin/ld: libtarget_system_arm.a.p/target_arm_ptw.c.o: undefined reference to symbol '__atomic_compare_exchange_8@@LIBATOMIC_1.0' > If that fails, I think you could s/TARGET_AARCH64/CONFIG_ATOMIC64/ here. > I'll revert this change and simply do this replace, adding a comment as well. > > r~