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From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 2/2] target/arm: Only implement doubles if the FPU supports them
Date: Fri, 14 Jun 2019 10:21:48 -0700	[thread overview]
Message-ID: <ab0b9cf8-98d2-1901-a8f7-259d6426f833@linaro.org> (raw)
In-Reply-To: <20190614104457.24703-3-peter.maydell@linaro.org>

On 6/14/19 3:44 AM, Peter Maydell wrote:
> @@ -173,6 +173,11 @@ static bool trans_VSEL(DisasContext *s, arg_VSEL *a)
>          ((a->vm | a->vn | a->vd) & 0x10)) {
>          return false;
>      }
> +
> +    if (dp && !dc_isar_feature(aa32_fpdp, s)) {
> +        return false;
> +    }

Would it be cleaner to define something like

static bool vfp_dp_enabled(DisasContext *s, int regmask)
{
    if (!dc_isar_feature(aa32_fpdp, s)) {
        /* All double-precision disabled.  */
        return false;
    }
    if (!dc_isar_feature(aa32_fp_d32, s) && (regmask & 0x10)) {
        /* D16-D31 do not exist.  */
        return false;
    }
    return true;
}

Then use

    if (dp && !vfp_dp_enabled(s, a->vm | a->vn | a->vd))

?


r~


  reply	other threads:[~2019-06-14 18:09 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-14 10:44 [Qemu-devel] [PATCH 0/2] target/arm: Support single-precision only FPUs Peter Maydell
2019-06-14 10:44 ` [Qemu-devel] [PATCH 1/2] target/arm: Fix typos in trans function prototypes Peter Maydell
2019-06-14 12:41   ` Philippe Mathieu-Daudé
2019-06-14 10:44 ` [Qemu-devel] [PATCH 2/2] target/arm: Only implement doubles if the FPU supports them Peter Maydell
2019-06-14 17:21   ` Richard Henderson [this message]
2019-06-14 17:52     ` Peter Maydell
2019-06-14 21:45       ` Richard Henderson

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