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From: Magnus Kulke <magnuskulke@linux.microsoft.com>
To: Mohamed Mediouni <mohamed@unpredictable.fr>
Cc: qemu-devel@nongnu.org, Zhao Liu <zhao1.liu@intel.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Wei Liu <liuwe@microsoft.com>,
	Magnus Kulke <magnuskulke@microsoft.com>,
	Wei Liu <wei.liu@kernel.org>
Subject: Re: [PATCH v2 9/9] accel/mshv: disable la57 (5lvl paging)
Date: Wed, 11 Mar 2026 19:40:55 +0100	[thread overview]
Message-ID: <abG3Ny8OhedOBtST@example.com> (raw)
In-Reply-To: <5FCD2D66-8079-4F65-A85D-473F78FBC1D4@unpredictable.fr>

On Wed, Mar 11, 2026 at 04:31:41PM +0100, Mohamed Mediouni wrote:
> Thank you, I’ll test this further. Boot-tested it on an Alpine Linux VM but looks like
> that wasn’t enough...
> 
> FYI I added a new callback interface in x86_emul_ops (mmu_gva_to_gpa) to support
> adding the Hyper-V page table walker, but if it’s anything like the WHP one it’s going to
> be very slow… which is why I moved to the new interface in the first place.

hmm, I quickly tried that and implemented a hook like this:

static MMUTranslateResult gva_to_gpa(CPUState *cpu, target_ulong gva,
                                     uint64_t *gpa, MMUTranslateFlags flags)
{
    uint64_t hv_flags = 0;

    if (!x86_is_paging_mode(cpu)) {
        *gpa = gva;

        return MMU_TRANSLATE_SUCCESS;
    }

    if (flags & MMU_TRANSLATE_VALIDATE_WRITE) {
        hv_flags = HV_TRANSLATE_GVA_VALIDATE_WRITE;
    } else if (flags & MMU_TRANSLATE_VALIDATE_EXECUTE) {
        hv_flags = HV_TRANSLATE_GVA_VALIDATE_EXECUTE;
    } else {
        hv_flags = HV_TRANSLATE_GVA_VALIDATE_READ;
    }

    if (translate_gva(cpu, gva, gpa, hv_flags) < 0) {
        return MMU_TRANSLATE_PAGE_NOT_MAPPED;
    }

    return MMU_TRANSLATE_SUCCESS;
}

static const struct x86_emul_ops mshv_x86_emul_ops = {
    .read_segment_descriptor = read_segment_descriptor,
    .mmu_gva_to_gpa = gva_to_gpa,
};

but without explicitly disabling la57, I still see the same MMIO errors
during guest boot (ubuntu jammy). probably needs more investigation. I
think for now disabling la57 seems ok.


      reply	other threads:[~2026-03-11 18:41 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-11 11:34 [PATCH v2 0/9] Support QEMU cpu models in MSHV accelerator Magnus Kulke
2026-03-11 11:34 ` [PATCH v2 1/9] accel/mshv: use mshv_create_partition_v2 payload Magnus Kulke
2026-03-11 20:54   ` Wei Liu
2026-03-12 10:47   ` Anirudh Rayabharam
2026-03-12 10:53     ` Anirudh Rayabharam
2026-03-12 10:55     ` [PATCH v2 9/9] accel/mshv: disable la57 (5lvl paging) Anirudh Rayabharam
2026-03-23 10:55     ` [PATCH v2 1/9] accel/mshv: use mshv_create_partition_v2 payload Magnus Kulke
2026-03-11 11:34 ` [PATCH v2 2/9] target/i386/mshv: fix cpuid propagation bug Magnus Kulke
2026-03-11 11:40   ` Philippe Mathieu-Daudé
2026-03-11 11:34 ` [PATCH v2 3/9] target/i386/mshv: fix various cpuid traversal bugs Magnus Kulke
2026-03-11 20:58   ` Wei Liu
2026-03-11 11:35 ` [PATCH v2 4/9] target/i386/mshv: change cpuid mask to UINT32_MAX Magnus Kulke
2026-03-11 21:36   ` Wei Liu
2026-03-11 11:35 ` [PATCH v2 5/9] target/i386/mshv: set cpu model name on -cpu host Magnus Kulke
2026-03-11 21:37   ` Wei Liu
2026-03-11 11:35 ` [PATCH v2 6/9] target/i386: query mshv accel for supported cpuids Magnus Kulke
2026-03-11 11:35 ` [PATCH v2 7/9] target/i386/mshv: populate xsave area offsets Magnus Kulke
2026-03-11 11:35 ` [PATCH v2 8/9] target/i386/mshv: filter out CET bits in cpuid Magnus Kulke
2026-03-11 11:35 ` [PATCH v2 9/9] accel/mshv: disable la57 (5lvl paging) Magnus Kulke
2026-03-11 11:54   ` Mohamed Mediouni
2026-03-11 15:17     ` Magnus Kulke
2026-03-11 15:31       ` Mohamed Mediouni
2026-03-11 18:40         ` Magnus Kulke [this message]

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