From: David Hildenbrand <david@redhat.com>
To: Thomas Huth <thuth@redhat.com>,
Richard Henderson <rth@twiddle.net>,
qemu-devel@nongnu.org, Alexander Graf <agraf@suse.de>
Cc: mmarek@suse.com, mbenes@suse.cz
Subject: Re: [Qemu-devel] [PATCH v1] target/s390x: Add support for the TEST BLOCK instruction
Date: Wed, 17 May 2017 19:03:05 +0200 [thread overview]
Message-ID: <ac695417-b287-d0cc-a90a-4cb49bfcb79a@redhat.com> (raw)
In-Reply-To: <53fcf39a-026c-bd18-da5d-48442b6570b9@redhat.com>
On 17.05.2017 18:05, Thomas Huth wrote:
> On 16.05.2017 21:06, Richard Henderson wrote:
>> On 05/16/2017 02:28 AM, Thomas Huth wrote:
>>> +void HELPER(testblock)(CPUS390XState *env, uint64_t addr)
>>> +{
>>> + CPUState *cs = CPU(s390_env_get_cpu(env));
>>> + int i;
>>> +
>>> + addr = get_address(env, 0, 0, addr) & ~0xfffULL;
>>> + for (i = 0; i < TARGET_PAGE_SIZE; i += 8) {
>>> + stq_phys(cs->as, addr + i, 0);
>>> + }
>>> + env->cc_op = 0;
>>> +}
>>
>> This needs several changes: check that the physical page does indeed
>> exist, "low address protection", return the cc code.
>
> Ok, ... but if we care about "low address protection", shouldn't we also
> add that to the other CPU instructions, too? (As far as I can see, it is
> not supported by the TCG code at all yet)
The same should be true for storage key checks, right? I think there are
a lot of such checks missing.
--
Thanks,
David
prev parent reply other threads:[~2017-05-17 17:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-16 9:28 [Qemu-devel] [PATCH v1] target/s390x: Add support for the TEST BLOCK instruction Thomas Huth
2017-05-16 13:42 ` Aurelien Jarno
2017-05-17 7:18 ` Thomas Huth
2017-05-16 19:06 ` Richard Henderson
2017-05-17 16:05 ` Thomas Huth
2017-05-17 17:03 ` David Hildenbrand [this message]
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