From: "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To: "Bibo Mao" <maobibo@loongson.cn>, "QEMU devel" <qemu-devel@nongnu.org>
Cc: "Song Gao" <gaosong@loongson.cn>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH v2 0/9] target/loongarch: LoongArch32 fixes 1
Date: Thu, 27 Feb 2025 12:36:15 +0000 [thread overview]
Message-ID: <ac8df425-6aae-4297-ab97-f5d3488b73b0@app.fastmail.com> (raw)
In-Reply-To: <9c3dd441-97bc-6884-9863-371fb23441b0@loongson.cn>
在2025年2月27日二月 下午12:21,bibo mao写道:
[...]
>>>> int pin.
>>> Thanks for the information, Would you like to emulate LoongArch32
>>> chiplap FPGA board in qemu side or other LoongArch32 boards?
>>
>> My plan is to use current virt machine (with EXTIOI and so on) for
>> LoongArch32, it is trivial to bring up in kernel and give us a lot more
>> flexibility rather than emulating an actual board.
> virt machine is mainly for kvm board. If it is used as LoongArch32
> board, there is no much benefit to add bunch of code in kernel and qemu
> to emulate non-exist board, on the contrast it is hard to maintain.
Actually, it's 8 lines of code machine level code in my local tree to bring
up. Adding a new board will increase maintain burden as well. Also to note
that LoongArch32 TCG work is also for qemu user.
riscv32, arm32 are all sharing same virt board as well. QEMU is not only
serving KVM but also other users trying to evaluate and test on the platform.
For kernel drivers are already here, still, just a couple of Kconfig changes,
you can preview here [1].
>
> In LoongArch community There are many cases posting code in one time,
> disappear and lose maintenance :(
Yep, for hobbyists it's hard to sustain our effort :-( we are all trying
our best to contribute. I can potentially spare more time in Q2 to make
everything work.
Thanks
[1]: https://github.com/FlyGoat/linux/tree/b4/la32
--
- Jiaxun
prev parent reply other threads:[~2025-02-27 12:37 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-25 0:40 [PATCH v2 0/9] target/loongarch: LoongArch32 fixes 1 Jiaxun Yang
2025-02-25 0:40 ` [PATCH v2 1/9] target/loongarch: Enable rotr.w/rotri.w for LoongArch32 Jiaxun Yang
2025-02-25 0:40 ` [PATCH v2 2/9] target/loongarch: Fix address generation for gen_sc Jiaxun Yang
2025-02-25 0:40 ` [PATCH v2 3/9] target/loongarch: Fix PGD CSR for LoongArch32 Jiaxun Yang
2025-02-25 14:40 ` Philippe Mathieu-Daudé
2025-02-25 0:40 ` [PATCH v2 4/9] target/loongarch: Perform sign extension for IOCSR reads Jiaxun Yang
2025-02-25 0:40 ` [PATCH v2 5/9] target/loongarch: Use target_ulong for iocsrrd helper results Jiaxun Yang
2025-02-25 0:40 ` [PATCH v2 6/9] target/loongarch: Fix some modifiers for log formatting Jiaxun Yang
2025-02-25 14:44 ` Philippe Mathieu-Daudé
2025-02-25 0:40 ` [PATCH v2 7/9] target/loongarch: Use target_ulong for CSR helpers Jiaxun Yang
2025-02-25 0:40 ` [PATCH v2 8/9] target/loongarch: Fix load type for gen_ll Jiaxun Yang
2025-02-25 0:40 ` [PATCH v2 9/9] target/loongarch: Introduce max32 CPU type Jiaxun Yang
2025-02-25 8:50 ` [PATCH v2 0/9] target/loongarch: LoongArch32 fixes 1 bibo mao
2025-02-25 12:08 ` Jiaxun Yang
2025-02-25 12:33 ` bibo mao
2025-02-27 10:44 ` Jiaxun Yang
2025-02-27 12:21 ` bibo mao
2025-02-27 12:36 ` Jiaxun Yang [this message]
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