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From: Max Chou <max.chou@sifive.com>
To: Alistair Francis <alistair23@gmail.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	 Weiwei Li <liwei1518@gmail.com>,
	Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>,
	 Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
	Chao Liu <chao.liu.zevorn@gmail.com>
Subject: Re: [PATCH v5 0/9] Add Zvfbfa extension support
Date: Thu, 26 Mar 2026 11:42:58 +0800	[thread overview]
Message-ID: <acSqxQQxnO0HdB8M@sifive.com> (raw)
In-Reply-To: <CAKmqyKP-42diNbiAwr_qykVTAYgR=Ok2S4dgLwPN5oGuLTQGRg@mail.gmail.com>

On 2026-03-19 13:45, Alistair Francis wrote:
> Yes, that's how things previously worked. Basically I think we just
> need a tag (that won't be changed) in an official RISC-V repo that we
> can point to. That way it's easy to say "this is the exact version we
> used to write the QEMU implementation". Then if there is a version 0.2
> we can easily see what has changed and update to match.
> 

Hi Alistair,

The official riscv-isa-manual repository has added a new tag for the
frozen Zvfbfa v0.9, as shown below:

https://github.com/riscv/riscv-isa-manual/releases/tag/zvfbfa-0.9

The current v5 implementation fully complies with this frozen
specification.

Since the Zvfbfa is frozen, should I prepare a v6 that removes the “x-“
prefix from the zvfbfa property and updates the specification reference
?

Thanks,
rnax

> With the seemingly infinite number of draft extensions we need
> something to manage the version and compatibility, and that seems like
> the best bet.
> 
> Posting the draft PDF spec somewhere immutable would also work. We
> just need to be able to point to something that won't change and
> represents some sort of "release". So a git commit doesn't seem like
> enough, we need a "release" that everyone can converge on.
> 
> Alistair


  reply	other threads:[~2026-03-26  3:44 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-06  7:10 [PATCH v5 0/9] Add Zvfbfa extension support Max Chou
2026-03-06  7:10 ` [PATCH v5 1/9] target/riscv: Add cfg properties for Zvfbfa extensions Max Chou
2026-03-09  4:44   ` Alistair Francis
2026-03-06  7:10 ` [PATCH v5 2/9] target/riscv: Add the Zvfbfa extension implied rule Max Chou
2026-03-09  4:45   ` Alistair Francis
2026-03-06  7:10 ` [PATCH v5 3/9] target/riscv: rvv: Add new VTYPE CSR field - altfmt Max Chou
2026-03-09  4:55   ` Alistair Francis
2026-03-16  9:20   ` Nutty.Liu
2026-03-06  7:10 ` [PATCH v5 4/9] target/riscv: rvv: Introduce reset_ill_vtype to reset illegal vtype CSR Max Chou
2026-03-09  4:55   ` Alistair Francis
2026-03-16  9:22   ` Nutty.Liu
2026-03-06  7:11 ` [PATCH v5 5/9] target/riscv: Use the tb->cs_base as the extend tb flags Max Chou
2026-03-09  5:01   ` Alistair Francis
2026-03-12 11:42     ` Max Chou
2026-03-13  0:59       ` Alistair Francis
2026-03-06  7:11 ` [PATCH v5 6/9] target/riscv: Introduce altfmt into DisasContext Max Chou
2026-03-09  5:02   ` Alistair Francis
2026-03-06  7:11 ` [PATCH v5 7/9] target/riscv: Introduce BF16 canonical NaN for Zvfbfa extension Max Chou
2026-03-09  5:04   ` Alistair Francis
2026-03-06  7:11 ` [PATCH v5 8/9] target/riscv: rvv: Support Zvfbfa vector bf16 operations Max Chou
2026-03-06  7:11 ` [PATCH v5 9/9] target/riscv: Expose Zvfbfa extension as an experimental cpu property Max Chou
2026-03-09  4:51 ` [PATCH v5 0/9] Add Zvfbfa extension support Alistair Francis
2026-03-12 11:16   ` Max Chou
2026-03-13  1:09     ` Alistair Francis
2026-03-16  8:28       ` Max Chou
2026-03-19  3:45         ` Alistair Francis
2026-03-26  3:42           ` Max Chou [this message]
2026-03-26  6:07             ` Chao Liu

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