From: Nicolin Chen <nicolinc@nvidia.com>
To: "Duan, Zhenzhong" <zhenzhong.duan@intel.com>
Cc: "skolothumtho@nvidia.com" <skolothumtho@nvidia.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"alex@shazbot.org" <alex@shazbot.org>,
"clg@redhat.com" <clg@redhat.com>,
"eric.auger@redhat.com" <eric.auger@redhat.com>,
"mst@redhat.com" <mst@redhat.com>,
"jasowang@redhat.com" <jasowang@redhat.com>,
"jgg@nvidia.com" <jgg@nvidia.com>,
"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
"clement.mathieu--drif@bull.com" <clement.mathieu--drif@bull.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
"Liu, Yi L" <yi.l.liu@intel.com>,
"Hao, Xudong" <xudong.hao@intel.com>
Subject: Re: [PATCH v2 03/14] vfio/iommufd: Create nesting parent hwpt with IOMMU_HWPT_ALLOC_PASID flag
Date: Thu, 26 Mar 2026 21:08:58 -0700 [thread overview]
Message-ID: <acYC2ko1r8OkAvq0@nvidia.com> (raw)
In-Reply-To: <IA3PR11MB9136D7618C06EFF1D66561549257A@IA3PR11MB9136.namprd11.prod.outlook.com>
On Fri, Mar 27, 2026 at 02:29:20AM +0000, Duan, Zhenzhong wrote:
> >-----Original Message-----
> >From: Nicolin Chen <nicolinc@nvidia.com>
> >Subject: Re: [PATCH v2 03/14] vfio/iommufd: Create nesting parent hwpt with
> >IOMMU_HWPT_ALLOC_PASID flag
> >
> >On Thu, Mar 26, 2026 at 05:11:17AM -0400, Zhenzhong Duan wrote:
> >> @@ -430,6 +431,11 @@ static bool
> >iommufd_cdev_autodomains_get(VFIODevice *vbasedev,
> >> }
> >> }
> >>
> >> + if (max_pasid_log2 &&
> >> + vfio_device_get_viommu_flags_pasid_supported(vbasedev)) {
> >> + flags |= IOMMU_HWPT_ALLOC_PASID;
> >> + }
> >
> >This would set it to:
> > IOMMU_HWPT_ALLOC_PASID | IOMMU_HWPT_ALLOC_NEST_PARENT
> >which isn't supported on ARM :-/
>
> I am a bit confused, if smmu supports dirty tracking, flags would be
> set to IOMMU_HWPT_ALLOC_DIRTY_TRACKING | IOMMU_HWPT_ALLOC_NEST_PARENT,
> in arm_smmu_domain_alloc_paging_flags(), I see it will return -EOPNOTSUPP.
> So how did smmu work in this case?
You hit a point. I almost forgot we need to do something with that
dirty tracking flag. This is currently broken..
For NVIDIA, the current generation Grace CPU doesn't support dirty
tracking. So, our QEMU VMs don't set that flag. This is just lucky
for us. Yet, it would trigger -EOPNOTSUPP on ARM CPU that supports,
as you mentioned.
For pasid attachment however, ARM doesn't need it: regular pasid=0
attach already has the pointer to a stage-1 PASID table.
Nicolin
next prev parent reply other threads:[~2026-03-27 4:10 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-26 9:11 [PATCH v2 00/14] intel_iommu: Enable PASID support for passthrough device Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 01/14] vfio/iommufd: Extend attach/detach_hwpt callback implementations with pasid Zhenzhong Duan
2026-03-26 22:04 ` Nicolin Chen
2026-03-26 9:11 ` [PATCH v2 02/14] iommufd: Extend attach/detach_hwpt callbacks to support pasid Zhenzhong Duan
2026-03-26 22:18 ` Nicolin Chen
2026-03-27 2:32 ` Duan, Zhenzhong
2026-03-27 3:48 ` Nicolin Chen
2026-03-27 6:44 ` Duan, Zhenzhong
2026-03-27 4:29 ` Yi Liu
2026-03-27 6:45 ` Duan, Zhenzhong
2026-03-26 9:11 ` [PATCH v2 03/14] vfio/iommufd: Create nesting parent hwpt with IOMMU_HWPT_ALLOC_PASID flag Zhenzhong Duan
2026-03-26 22:53 ` Nicolin Chen
2026-03-27 2:29 ` Duan, Zhenzhong
2026-03-27 4:08 ` Nicolin Chen [this message]
2026-03-27 6:58 ` Duan, Zhenzhong
2026-03-27 4:29 ` Yi Liu
2026-03-27 7:26 ` Duan, Zhenzhong
2026-03-26 9:11 ` [PATCH v2 04/14] intel_iommu: Create the nested " Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 05/14] intel_iommu: Change pasid property from bool to uint8 Zhenzhong Duan
2026-03-27 4:30 ` Yi Liu
2026-03-26 9:11 ` [PATCH v2 06/14] intel_iommu: Export some functions Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 07/14] intel_iommu_accel: Handle PASID entry addition for pc_inv_dsc request Zhenzhong Duan
2026-03-27 4:30 ` Yi Liu
2026-03-26 9:11 ` [PATCH v2 08/14] intel_iommu_accel: Handle PASID entry removal " Zhenzhong Duan
2026-03-27 4:31 ` Yi Liu
2026-03-26 9:11 ` [PATCH v2 09/14] intel_iommu_accel: Bypass PASID entry addition for just deleted entry Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 10/14] intel_iommu_accel: Handle PASID entry removal for system reset Zhenzhong Duan
2026-03-27 4:32 ` Yi Liu
2026-03-26 9:11 ` [PATCH v2 11/14] intel_iommu_accel: Support pasid binding/unbinding and PIOTLB flushing Zhenzhong Duan
2026-03-27 4:32 ` Yi Liu
2026-03-26 9:11 ` [PATCH v2 12/14] intel_iommu_accel: drop _lock suffix in vtd_flush_host_piotlb_all_locked() Zhenzhong Duan
2026-03-26 9:11 ` [PATCH v2 13/14] intel_iommu_accel: Add pasid bits size check Zhenzhong Duan
2026-03-27 4:32 ` Yi Liu
2026-03-26 9:11 ` [PATCH v2 14/14] intel_iommu: Expose flag VIOMMU_FLAG_PASID_SUPPORTED when configured Zhenzhong Duan
2026-03-27 3:58 ` [PATCH v2 00/14] intel_iommu: Enable PASID support for passthrough device Hao, Xudong
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