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([2607:fb90:8f63:c378:eef6:b8e3:754a:aabf]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-702425df2a4sm1743311b3a.54.2024.05.31.13.01.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 31 May 2024 13:01:52 -0700 (PDT) Message-ID: Date: Fri, 31 May 2024 13:01:49 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PULL 00/43] target-arm queue To: Peter Maydell , qemu-devel@nongnu.org References: <20240531120401.394550-1-peter.maydell@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <20240531120401.394550-1-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 5/31/24 05:03, Peter Maydell wrote: > The following changes since commit 3b2fe44bb7f605f179e5e7feb2c13c2eb3abbb80: > > Merge tag 'pull-request-2024-05-29' ofhttps://gitlab.com/thuth/qemu into staging (2024-05-29 08:38:20 -0700) > > are available in the Git repository at: > > https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240531 > > for you to fetch changes up to 3c3c233677d4f2fe5f35c5d6d6e9b53df48054f4: > > hw/usb/hcd-ohci: Fix #1510, #303: pid not IN or OUT (2024-05-31 11:26:00 +0100) > > ---------------------------------------------------------------- > target-arm: > * hw/intc/arm_gic: Fix set pending of PPIs > * hw/intc/arm_gic: Fix writes to GICD_ITARGETSRn > * xilinx_zynq: Add cache controller > * xilinx_zynq: Support up to two CPU cores > * tests/avocado: update sbsa-ref firmware > * sbsa-ref: move to Neoverse-N2 as default > * More decodetree conversion of A64 ASIMD insns > * docs/system/target-arm: Re-alphabetize board list > * Implement FEAT WFxT and enable for '-cpu max' > * hw/usb/hcd-ohci: Fix #1510, #303: pid not IN or OUT Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/9.1 as appropriate. r~