From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH for-8.0 v3 40/45] tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128
Date: Tue, 22 Nov 2022 06:47:35 -0300 [thread overview]
Message-ID: <acd628ff-f6af-6714-5976-70b80b6bf210@gmail.com> (raw)
In-Reply-To: <20221111074101.2069454-41-richard.henderson@linaro.org>
On 11/11/22 04:40, Richard Henderson wrote:
> Fill in the parameters for the host ABI for Int128 for
> those backends which require no extra modification.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> tcg/aarch64/tcg-target.h | 2 ++
> tcg/arm/tcg-target.h | 2 ++
> tcg/loongarch64/tcg-target.h | 2 ++
> tcg/mips/tcg-target.h | 2 ++
> tcg/riscv/tcg-target.h | 3 +++
> tcg/s390x/tcg-target.h | 2 ++
> tcg/sparc64/tcg-target.h | 2 ++
> tcg/tcg.c | 6 +++---
> tcg/ppc/tcg-target.c.inc | 3 +++
> 9 files changed, 21 insertions(+), 3 deletions(-)
>
> diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
> index 413a5410c5..0dff5807f6 100644
> --- a/tcg/aarch64/tcg-target.h
> +++ b/tcg/aarch64/tcg-target.h
> @@ -54,6 +54,8 @@ typedef enum {
> #define TCG_TARGET_CALL_STACK_OFFSET 0
> #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL
> #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL
> +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL
> +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL
>
> /* optional instructions */
> #define TCG_TARGET_HAS_div_i32 1
> diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
> index b7843d2d54..6613d3d791 100644
> --- a/tcg/arm/tcg-target.h
> +++ b/tcg/arm/tcg-target.h
> @@ -91,6 +91,8 @@ extern bool use_neon_instructions;
> #define TCG_TARGET_CALL_STACK_OFFSET 0
> #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL
> #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN
> +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN
> +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_BY_REF
>
> /* optional instructions */
> #define TCG_TARGET_HAS_ext8s_i32 1
> diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h
> index e5f7a1f09d..9d0db8fdfe 100644
> --- a/tcg/loongarch64/tcg-target.h
> +++ b/tcg/loongarch64/tcg-target.h
> @@ -95,6 +95,8 @@ typedef enum {
> #define TCG_TARGET_CALL_STACK_OFFSET 0
> #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL
> #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL
> +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL
> +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL
>
> /* optional instructions */
> #define TCG_TARGET_HAS_movcond_i32 0
> diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
> index 15721c3e42..b235cba8ba 100644
> --- a/tcg/mips/tcg-target.h
> +++ b/tcg/mips/tcg-target.h
> @@ -89,6 +89,8 @@ typedef enum {
> # define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL
> #endif
> #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL
> +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN
> +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL
>
> /* MOVN/MOVZ instructions detection */
> #if (defined(__mips_isa_rev) && (__mips_isa_rev >= 1)) || \
> diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h
> index 232537ccea..d61ca902d3 100644
> --- a/tcg/riscv/tcg-target.h
> +++ b/tcg/riscv/tcg-target.h
> @@ -85,9 +85,12 @@ typedef enum {
> #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL
> #if TCG_TARGET_REG_BITS == 32
> #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN
> +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN
> #else
> #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL
> +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL
> #endif
> +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL
>
> /* optional instructions */
> #define TCG_TARGET_HAS_movcond_i32 0
> diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h
> index db5665c375..9a3856f0b3 100644
> --- a/tcg/s390x/tcg-target.h
> +++ b/tcg/s390x/tcg-target.h
> @@ -168,6 +168,8 @@ extern uint64_t s390_facilities[3];
> #define TCG_TARGET_CALL_STACK_OFFSET 160
> #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EXTEND
> #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_RET_NORMAL
> +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_BY_REF
> +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_BY_REF
>
> #define TCG_TARGET_HAS_MEMORY_BSWAP 1
>
> diff --git a/tcg/sparc64/tcg-target.h b/tcg/sparc64/tcg-target.h
> index 0044ac8d78..53cfa843da 100644
> --- a/tcg/sparc64/tcg-target.h
> +++ b/tcg/sparc64/tcg-target.h
> @@ -73,6 +73,8 @@ typedef enum {
> #define TCG_TARGET_CALL_STACK_OFFSET (128 + 6*8 + TCG_TARGET_STACK_BIAS)
> #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EXTEND
> #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL
> +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL
> +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL
>
> #if defined(__VIS__) && __VIS__ >= 0x300
> #define use_vis3_instructions 1
> diff --git a/tcg/tcg.c b/tcg/tcg.c
> index 9dd194a2f2..5465297495 100644
> --- a/tcg/tcg.c
> +++ b/tcg/tcg.c
> @@ -743,8 +743,8 @@ static void init_call_layout(TCGHelperInfo *info)
> break;
> case dh_typecode_i128:
> info->nr_out = 128 / TCG_TARGET_REG_BITS;
> - info->out_kind = TCG_CALL_RET_NORMAL; /* TODO */
> - switch (/* TODO */ TCG_CALL_RET_NORMAL) {
> + info->out_kind = TCG_TARGET_CALL_RET_I128;
> + switch (TCG_TARGET_CALL_RET_I128) {
> case TCG_CALL_RET_NORMAL:
> /* Query the last register now to trigger any assert early. */
> tcg_target_call_oarg_reg(info->out_kind, info->nr_out - 1);
> @@ -815,7 +815,7 @@ static void init_call_layout(TCGHelperInfo *info)
> layout_arg_1(&cum, info, TCG_CALL_ARG_NORMAL);
> break;
> case dh_typecode_i128:
> - switch (/* TODO */ TCG_CALL_ARG_NORMAL) {
> + switch (TCG_TARGET_CALL_ARG_I128) {
> case TCG_CALL_ARG_EVEN:
> layout_arg_even(&cum);
> /* fall through */
> diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
> index 781ecfe161..e86d4a5e78 100644
> --- a/tcg/ppc/tcg-target.c.inc
> +++ b/tcg/ppc/tcg-target.c.inc
> @@ -54,6 +54,9 @@
> #else
> # define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL
> #endif
> +/* Note sysv arg alignment applies only to 2-word types, not more. */
> +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL
> +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL
>
> /* For some memory operations, we need a scratch that isn't R0. For the AIX
> calling convention, we can re-use the TOC register since we'll be reloading
next prev parent reply other threads:[~2022-11-22 9:48 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-11 7:40 [PATCH for-8.0 v3 00/45] tcg: Support for Int128 with helpers Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 01/45] meson: Move CONFIG_TCG_INTERPRETER to config_host Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 02/45] tcg: Tidy tcg_reg_alloc_op Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 03/45] tcg: Introduce paired register allocation Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 04/45] tcg/s390x: Use register pair allocation for div and mulu2 Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 05/45] tcg/arm: Use register pair allocation for qemu_{ld, st}_i64 Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 06/45] tcg: Remove TCG_TARGET_STACK_GROWSUP Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 07/45] accel/tcg: Set cflags_next_tb in cpu_common_initfn Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 08/45] target/sparc: Avoid TCGV_{LOW,HIGH} Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 09/45] tcg: Move TCG_{LOW,HIGH} to tcg-internal.h Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 10/45] tcg: Add temp_subindex to TCGTemp Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 11/45] tcg: Simplify calls to temp_sync vs mem_coherent Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 12/45] tcg: Allocate TCGTemp pairs in host memory order Richard Henderson
2022-11-22 11:25 ` Philippe Mathieu-Daudé
2022-11-11 7:40 ` [PATCH for-8.0 v3 13/45] tcg: Move TCG_TYPE_COUNT outside enum Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 14/45] tcg: Introduce tcg_type_size Richard Henderson
2022-11-22 11:30 ` Philippe Mathieu-Daudé
2022-11-22 16:54 ` Richard Henderson
2022-11-22 18:14 ` Philippe Mathieu-Daudé
2022-11-22 18:15 ` Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 15/45] tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind Richard Henderson
2022-11-22 11:33 ` Philippe Mathieu-Daudé
2022-11-11 7:40 ` [PATCH for-8.0 v3 16/45] tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64 Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 17/45] tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32 Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 18/45] tcg: Use TCG_CALL_ARG_EVEN for TCI special case Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 19/45] accel/tcg/plugin: Don't search for the function pointer index Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 20/45] accel/tcg/plugin: Avoid duplicate copy in copy_call Richard Henderson
2022-11-22 15:21 ` Philippe Mathieu-Daudé
2022-11-11 7:40 ` [PATCH for-8.0 v3 21/45] accel/tcg/plugin: Use copy_op in append_{udata, mem}_cb Richard Henderson
2022-11-22 15:22 ` Philippe Mathieu-Daudé
2022-11-11 7:40 ` [PATCH for-8.0 v3 22/45] tci: MAX_OPC_PARAM_IARGS is no longer used Richard Henderson
2022-11-22 15:25 ` Philippe Mathieu-Daudé
2022-11-11 7:40 ` [PATCH for-8.0 v3 23/45] tcg: Vary the allocation size for TCGOp Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 24/45] tcg: Use output_pref wrapper function Richard Henderson
2022-11-22 15:28 ` Philippe Mathieu-Daudé
2022-11-11 7:40 ` [PATCH for-8.0 v3 25/45] tcg: Reorg function calls Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 26/45] tcg: Move ffi_cif pointer into TCGHelperInfo Richard Henderson
2022-11-22 18:08 ` [PATCH 0/3] tcg: Move ffi_cif pointer into TCGHelperInfo (splitted) Philippe Mathieu-Daudé
2022-11-22 18:08 ` [PATCH 1/3] tcg: Convert typecode_to_ffi from array to function Philippe Mathieu-Daudé
2022-11-22 18:08 ` [PATCH 2/3] tcg: Factor init_ffi_layouts() out of tcg_context_init() Philippe Mathieu-Daudé
2022-11-22 18:08 ` [PATCH 3/3] tcg: Move ffi_cif pointer into TCGHelperInfo Philippe Mathieu-Daudé
2022-11-23 16:22 ` Philippe Mathieu-Daudé
2022-11-11 7:40 ` [PATCH for-8.0 v3 27/45] tcg/aarch64: Merge tcg_out_callr into tcg_out_call Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 28/45] tcg: Add TCGHelperInfo argument to tcg_out_call Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 29/45] tcg: Define TCG_TYPE_I128 and related helper macros Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 30/45] tcg: Handle dh_typecode_i128 with TCG_CALL_{RET, ARG}_NORMAL Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 31/45] tcg: Allocate objects contiguously in temp_allocate_frame Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 32/45] tcg: Introduce tcg_out_addi_ptr Richard Henderson
2022-11-22 9:45 ` Daniel Henrique Barboza
2022-11-11 7:40 ` [PATCH for-8.0 v3 33/45] tcg: Add TCG_CALL_{RET,ARG}_BY_REF Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 34/45] tcg: Introduce tcg_target_call_oarg_reg Richard Henderson
2022-11-22 9:41 ` Daniel Henrique Barboza
2022-11-11 7:40 ` [PATCH for-8.0 v3 35/45] tcg: Add TCG_CALL_RET_BY_VEC Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 36/45] include/qemu/int128: Use Int128 structure for TCI Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 37/45] tcg/i386: Add TCG_TARGET_CALL_{RET, ARG}_I128 Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 38/45] tcg/tci: Fix big-endian return register ordering Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 39/45] tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128 Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 40/45] tcg: " Richard Henderson
2022-11-22 9:47 ` Daniel Henrique Barboza [this message]
2022-11-11 7:40 ` [PATCH for-8.0 v3 41/45] tcg: Add temp allocation for TCGv_i128 Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 42/45] tcg: Add basic data movement " Richard Henderson
2022-11-11 7:40 ` [PATCH for-8.0 v3 43/45] tcg: Add guest load/store primitives " Richard Henderson
2022-11-11 7:41 ` [PATCH for-8.0 v3 44/45] tcg: Add tcg_gen_{non}atomic_cmpxchg_i128 Richard Henderson
2022-11-11 7:41 ` [PATCH for-8.0 v3 45/45] tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32, 64} Richard Henderson
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