From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: edgar.iglesias@gmail.com,
"Edgar E. Iglesias" <edgar.iglesias@amd.com>,
Luc Michel <luc.michel@amd.com>,
Sai Pavan Boddu <sai.pavan.boddu@amd.com>,
Michal Simek <michal.simek@amd.com>
Subject: Re: [PATCH 0/9] target/microblaze: Always use TARGET_LONG_BITS == 32
Date: Thu, 13 Feb 2025 13:37:09 +0100 [thread overview]
Message-ID: <ad364fce-f73d-4dde-b890-0ea86d9c4674@linaro.org> (raw)
In-Reply-To: <20250212220155.1147144-1-richard.henderson@linaro.org>
+AMD folks
On 12/2/25 23:01, Richard Henderson wrote:
> Use out-of-line helpers to implement extended address memory ops.
> With this, we can reduce TARGET_LONG_BITS to the more natural 32
> for this 32-bit cpu.
I thought about something similar 2 months ago, but then realized
MicroBlaze cores can be synthetized in 64-bit, and IIRC there is
not much missing (I'd say effort would be to add 20% more of what
we currently have). Just wanted to mention before taking the
decision to restrict to 32-bit. OTOH if there are no plan for
adding 64-bit support at AMD, then I'm more than happy to simplify
by considering only 32-bit.
> Richard Henderson (9):
> target/microblaze: Split out mb_unaligned_access_internal
> target/microblaze: Split out mb_transaction_failed_internal
> target/microblaze: Implement extended address load/store out of line
> target/microblaze: Use uint64_t for CPUMBState.ear
> target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea
> target/microblaze: Fix printf format in mmu_translate
> target/microblaze: Use TARGET_LONG_BITS == 32 for system mode
> target/microblaze: Drop DisasContext.r0
> target/microblaze: Simplify compute_ldst_addr_type{a,b}
next prev parent reply other threads:[~2025-02-13 12:38 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-12 22:01 [PATCH 0/9] target/microblaze: Always use TARGET_LONG_BITS == 32 Richard Henderson
2025-02-12 22:01 ` [PATCH 1/9] target/microblaze: Split out mb_unaligned_access_internal Richard Henderson
2025-02-12 22:01 ` [PATCH 2/9] target/microblaze: Split out mb_transaction_failed_internal Richard Henderson
2025-02-13 12:59 ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 3/9] target/microblaze: Implement extended address load/store out of line Richard Henderson
2025-02-12 22:01 ` [PATCH 4/9] target/microblaze: Use uint64_t for CPUMBState.ear Richard Henderson
2025-02-13 12:42 ` Philippe Mathieu-Daudé
2025-02-13 16:11 ` Richard Henderson
2025-04-30 8:46 ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 5/9] target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea Richard Henderson
2025-02-13 12:49 ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 6/9] target/microblaze: Fix printf format in mmu_translate Richard Henderson
2025-02-12 22:01 ` [PATCH 7/9] target/microblaze: Use TARGET_LONG_BITS == 32 for system mode Richard Henderson
2025-02-12 22:01 ` [PATCH 8/9] target/microblaze: Drop DisasContext.r0 Richard Henderson
2025-02-13 12:51 ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 9/9] target/microblaze: Simplify compute_ldst_addr_type{a,b} Richard Henderson
2025-02-13 12:56 ` Philippe Mathieu-Daudé
2025-02-13 12:37 ` Philippe Mathieu-Daudé [this message]
2025-03-05 0:21 ` [PATCH 0/9] target/microblaze: Always use TARGET_LONG_BITS == 32 Philippe Mathieu-Daudé
2025-04-30 6:26 ` Philippe Mathieu-Daudé
2025-04-30 7:29 ` Philippe Mathieu-Daudé
2025-04-30 10:54 ` Edgar E. Iglesias
2025-04-30 10:38 ` Edgar E. Iglesias
2025-04-30 11:09 ` Edgar E. Iglesias
2025-04-30 12:45 ` Philippe Mathieu-Daudé
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