From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48799) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2qPi-00055M-Pv for qemu-devel@nongnu.org; Tue, 17 May 2016 21:36:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b2nEL-0005Fo-3X for qemu-devel@nongnu.org; Tue, 17 May 2016 18:12:48 -0400 Received: from mail-qk0-x232.google.com ([2607:f8b0:400d:c09::232]:35149) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2nEK-0005FY-UT for qemu-devel@nongnu.org; Tue, 17 May 2016 18:12:45 -0400 Received: by mail-qk0-x232.google.com with SMTP id n62so15424374qkc.2 for ; Tue, 17 May 2016 15:12:44 -0700 (PDT) Sender: Richard Henderson References: <1463196873-17737-1-git-send-email-cota@braap.org> <1463196873-17737-8-git-send-email-cota@braap.org> <573B5134.8060104@gmail.com> <66d14198-dab0-c72e-fe17-d022cff3feff@twiddle.net> <573B7793.9020109@gmail.com> <573B78A6.6030009@gmail.com> From: Richard Henderson Message-ID: Date: Tue, 17 May 2016 15:12:40 -0700 MIME-Version: 1.0 In-Reply-To: <573B78A6.6030009@gmail.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v5 07/18] qemu-thread: add simple test-and-set spinlock List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Sergey Fedorov , "Emilio G. Cota" , QEMU Developers , MTTCG Devel Cc: =?UTF-8?Q?Alex_Benn=c3=a9e?= , Paolo Bonzini , Peter Crosthwaite On 05/17/2016 01:01 PM, Sergey Fedorov wrote: >> Sorry, I can't see reading ARMv6 ARM that 1-byte access can't be atomic. What >> I've found: >> >> B2.4.1 Normal memory attribute >> (snip) >> Shared Normal memory >> >> (snip) >> ... Reads to Shared Normal Memory that are aligned in memory to the >> size of the access must be atomic. ... > Looks like GCC has no trouble generating __atomic_store_n() for 1-byte bool... Not loads and stores, but other atomic ops like xchg. The native atomic operations are all 4 bytes long. I suppose the compiler may well be able to synthesize sub-word atomic ops, but it'll be 2 or 3 times the size of a word-sized atomic op, and for no good reason. r~