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Mon, 2 Mar 2020 17:09:16 +0000 Subject: Re: [PATCH v4 09/16] target/i386: Cleanup and use the EPYC mode topology functions To: Igor Mammedov References: <158161767653.48948.10578064482878399556.stgit@naples-babu.amd.com> <158161784564.48948.10610888499052239029.stgit@naples-babu.amd.com> <20200224095253.17fb9852@redhat.com> <85bb2603-115a-1df2-df5d-887faae66bbe@amd.com> <20200225084905.11b9731d@redhat.com> From: Babu Moger Message-ID: Date: Mon, 2 Mar 2020 11:09:14 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 In-Reply-To: <20200225084905.11b9731d@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SN6PR2101CA0029.namprd21.prod.outlook.com (20.178.200.39) To SN1PR12MB2560.namprd12.prod.outlook.com (52.132.195.19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [10.236.30.87] (165.204.77.1) by SN6PR2101CA0029.namprd21.prod.outlook.com (20.178.200.39) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2814.1 via Frontend Transport; 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X-Microsoft-Antispam-Message-Info: 3cVe/BrwGnHFGkV/Y5YYCP8s8qvJP1gXGXcgXKZOsx9mQD4GY+geNCJR7Av+qiPV9dU33TzcFB6TKptnMApBndiVarQGfib9+aosGpEXZ+JPPvMpqwBjFUoz0yxHNJNUxoOIFMA9xrd4wCzf4si77246s8GgF/RZ2ZHu0Q1PLlnpTX1q1P9ZJSNYeIW2oAKh2OfsH1Wh98DY8skIqgarTvSecmT8QocaMBU+DtTQBz2C533UdvDeO/uorP7CREY4c+a01LmL8IlYeSqqmhCIce0BR9vEwrWye9TZJ3mzkQemPkJgWIBtKMuD53hupIYTvFJz08DM/dm0Q09T9gkR6oxTUP4Pr5ezDaBD5otJDXeuSJzoNLBq9n/dslcbXhfUmSHmyyQ444i+Zl1Fa33daaZ1SQqIkjAK2jVrf/ERGOLUhgh8zl4jIC4cuDV0omIt X-MS-Exchange-AntiSpam-MessageData: ZH0WJWeZCmoQbeLKOuMb5RqLVJcevupjNflOutGiRMOqvZEgb0sl4LB29hZFJsa+h0Ey8MzQCrPJ7hMWDegj2Jxw27ueTPkGlllsIIbNL/5M3pU5Cs4dik5blRv5ykzEI0QTZauMTXixNi+PIVeysg== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8b5346b6-35e6-4712-b822-08d7becc707d X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2020 17:09:16.8486 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: DrQS1Mpy+y9BDBjuV/3yEYq8C8e4tfudF/mTuvLFKMxlUSpUh6hfe3DReGPtgbdu X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2543 X-detected-operating-system: by eggs.gnu.org: Windows NT kernel [generic] [fuzzy] X-Received-From: 40.107.236.54 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ehabkost@redhat.com, mst@redhat.com, qemu-devel@nongnu.org, pbonzini@redhat.com, rth@twiddle.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 2/25/20 1:49 AM, Igor Mammedov wrote: > On Mon, 24 Feb 2020 11:29:37 -0600 > Babu Moger wrote: >=20 >> On 2/24/20 2:52 AM, Igor Mammedov wrote: >>> On Thu, 13 Feb 2020 12:17:25 -0600 >>> Babu Moger wrote: >>> =20 >>>> Use the new functions from topology.h and delete the unused code. Give= n the >>>> sockets, nodes, cores and threads, the new functions generate apic id = for EPYC >>>> mode. Removes all the hardcoded values. >>>> >>>> Signed-off-by: Babu Moger =20 >>> >>> modulo MAX() macro, looks fine to me =20 >> >> Igor, Sorry. What do you mean here? >=20 > I meant s/MAX(topo_info->nodes_per_pkg, 1)/topo_info->nodes_per_pkg/ >=20 > after it's made sure that topo_info->nodes_per_pkg is always valid. >=20 Noticed that we cannot change it in all the places and assign to valid value 1. We need this information to know weather the system is numa configured in topology.h. This is similar to ms->numa_state->num_nodes. This value is > 0 if system is numa configured else it is 0. I need this information while generating the apicid. I have added comments about it in topology.h. Hope this is not a problem. >=20 > (I believe I've commented on that somewhere. Series isn't split nicely, > so I've ended up applying it all and then reviewing so comments might > look out of the place sometimes, hopefully next revision will be easier > to review) >=20 >>> =20 >>>> --- >>>> target/i386/cpu.c | 162 +++++++++++---------------------------------= --------- >>>> 1 file changed, 35 insertions(+), 127 deletions(-) >>>> >>>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c >>>> index 5d6edfd09b..19675eb696 100644 >>>> --- a/target/i386/cpu.c >>>> +++ b/target/i386/cpu.c >>>> @@ -338,68 +338,15 @@ static void encode_cache_cpuid80000006(CPUCacheI= nfo *l2, >>>> } >>>> } >>>> =20 >>>> -/* >>>> - * Definitions used for building CPUID Leaf 0x8000001D and 0x8000001E >>>> - * Please refer to the AMD64 Architecture Programmer=E2=80=99s Manual= Volume 3. >>>> - * Define the constants to build the cpu topology. Right now, TOPOEXT >>>> - * feature is enabled only on EPYC. So, these constants are based on >>>> - * EPYC supported configurations. We may need to handle the cases if >>>> - * these values change in future. >>>> - */ >>>> -/* Maximum core complexes in a node */ >>>> -#define MAX_CCX 2 >>>> -/* Maximum cores in a core complex */ >>>> -#define MAX_CORES_IN_CCX 4 >>>> -/* Maximum cores in a node */ >>>> -#define MAX_CORES_IN_NODE 8 >>>> -/* Maximum nodes in a socket */ >>>> -#define MAX_NODES_PER_SOCKET 4 >>>> - >>>> -/* >>>> - * Figure out the number of nodes required to build this config. >>>> - * Max cores in a node is 8 >>>> - */ >>>> -static int nodes_in_socket(int nr_cores) >>>> -{ >>>> - int nodes; >>>> - >>>> - nodes =3D DIV_ROUND_UP(nr_cores, MAX_CORES_IN_NODE); >>>> - >>>> - /* Hardware does not support config with 3 nodes, return 4 in that= case */ >>>> - return (nodes =3D=3D 3) ? 4 : nodes; >>>> -} >>>> - >>>> -/* >>>> - * Decide the number of cores in a core complex with the given nr_cor= es using >>>> - * following set constants MAX_CCX, MAX_CORES_IN_CCX, MAX_CORES_IN_NO= DE and >>>> - * MAX_NODES_PER_SOCKET. Maintain symmetry as much as possible >>>> - * L3 cache is shared across all cores in a core complex. So, this wi= ll also >>>> - * tell us how many cores are sharing the L3 cache. >>>> - */ >>>> -static int cores_in_core_complex(int nr_cores) >>>> -{ >>>> - int nodes; >>>> - >>>> - /* Check if we can fit all the cores in one core complex */ >>>> - if (nr_cores <=3D MAX_CORES_IN_CCX) { >>>> - return nr_cores; >>>> - } >>>> - /* Get the number of nodes required to build this config */ >>>> - nodes =3D nodes_in_socket(nr_cores); >>>> - >>>> - /* >>>> - * Divide the cores accros all the core complexes >>>> - * Return rounded up value >>>> - */ >>>> - return DIV_ROUND_UP(nr_cores, nodes * MAX_CCX); >>>> -} >>>> - >>>> /* Encode cache info for CPUID[8000001D] */ >>>> -static void encode_cache_cpuid8000001d(CPUCacheInfo *cache, CPUState = *cs, >>>> - uint32_t *eax, uint32_t *ebx, >>>> - uint32_t *ecx, uint32_t *edx) >>>> +static void encode_cache_cpuid8000001d(CPUCacheInfo *cache, >>>> + X86CPUTopoInfo *topo_info, >>>> + uint32_t *eax, uint32_t *ebx, >>>> + uint32_t *ecx, uint32_t *edx) >>>> { >>>> uint32_t l3_cores; >>>> + unsigned nodes =3D MAX(topo_info->nodes_per_pkg, 1); >>>> + >>>> assert(cache->size =3D=3D cache->line_size * cache->associativity= * >>>> cache->partitions * cache->sets); >>>> =20 >>>> @@ -408,10 +355,13 @@ static void encode_cache_cpuid8000001d(CPUCacheI= nfo *cache, CPUState *cs, >>>> =20 >>>> /* L3 is shared among multiple cores */ >>>> if (cache->level =3D=3D 3) { >>>> - l3_cores =3D cores_in_core_complex(cs->nr_cores); >>>> - *eax |=3D ((l3_cores * cs->nr_threads) - 1) << 14; >>>> + l3_cores =3D DIV_ROUND_UP((topo_info->dies_per_pkg * >>>> + topo_info->cores_per_die * >>>> + topo_info->threads_per_core), >>>> + nodes); >>>> + *eax |=3D (l3_cores - 1) << 14; >>>> } else { >>>> - *eax |=3D ((cs->nr_threads - 1) << 14); >>>> + *eax |=3D ((topo_info->threads_per_core - 1) << 14); >>>> } >>>> =20 >>>> assert(cache->line_size > 0); >>>> @@ -431,55 +381,17 @@ static void encode_cache_cpuid8000001d(CPUCacheI= nfo *cache, CPUState *cs, >>>> (cache->complex_indexing ? CACHE_COMPLEX_IDX : 0); >>>> } >>>> =20 >>>> -/* Data structure to hold the configuration info for a given core ind= ex */ >>>> -struct core_topology { >>>> - /* core complex id of the current core index */ >>>> - int ccx_id; >>>> - /* >>>> - * Adjusted core index for this core in the topology >>>> - * This can be 0,1,2,3 with max 4 cores in a core complex >>>> - */ >>>> - int core_id; >>>> - /* Node id for this core index */ >>>> - int node_id; >>>> - /* Number of nodes in this config */ >>>> - int num_nodes; >>>> -}; >>>> - >>>> -/* >>>> - * Build the configuration closely match the EPYC hardware. Using the= EPYC >>>> - * hardware configuration values (MAX_CCX, MAX_CORES_IN_CCX, MAX_CORE= S_IN_NODE) >>>> - * right now. This could change in future. >>>> - * nr_cores : Total number of cores in the config >>>> - * core_id : Core index of the current CPU >>>> - * topo : Data structure to hold all the config info for this cor= e index >>>> - */ >>>> -static void build_core_topology(int nr_cores, int core_id, >>>> - struct core_topology *topo) >>>> -{ >>>> - int nodes, cores_in_ccx; >>>> - >>>> - /* First get the number of nodes required */ >>>> - nodes =3D nodes_in_socket(nr_cores); >>>> - >>>> - cores_in_ccx =3D cores_in_core_complex(nr_cores); >>>> - >>>> - topo->node_id =3D core_id / (cores_in_ccx * MAX_CCX); >>>> - topo->ccx_id =3D (core_id % (cores_in_ccx * MAX_CCX)) / cores_in_= ccx; >>>> - topo->core_id =3D core_id % cores_in_ccx; >>>> - topo->num_nodes =3D nodes; >>>> -} >>>> - >>>> /* Encode cache info for CPUID[8000001E] */ >>>> -static void encode_topo_cpuid8000001e(CPUState *cs, X86CPU *cpu, >>>> +static void encode_topo_cpuid8000001e(X86CPUTopoInfo *topo_info, X86C= PU *cpu, >>>> uint32_t *eax, uint32_t *ebx, >>>> uint32_t *ecx, uint32_t *edx) >>>> { >>>> - struct core_topology topo =3D {0}; >>>> - unsigned long nodes; >>>> + X86CPUTopoIDs topo_ids =3D {0}; >>>> + unsigned long nodes =3D MAX(topo_info->nodes_per_pkg, 1); >>>> int shift; >>>> =20 >>>> - build_core_topology(cs->nr_cores, cpu->core_id, &topo); >>>> + x86_topo_ids_from_apicid_epyc(cpu->apic_id, topo_info, &topo_ids)= ; >>>> + >>>> *eax =3D cpu->apic_id; >>>> /* >>>> * CPUID_Fn8000001E_EBX >>>> @@ -496,12 +408,8 @@ static void encode_topo_cpuid8000001e(CPUState *c= s, X86CPU *cpu, >>>> * 3 Core complex id >>>> * 1:0 Core id >>>> */ >>>> - if (cs->nr_threads - 1) { >>>> - *ebx =3D ((cs->nr_threads - 1) << 8) | (topo.node_id << 3) | >>>> - (topo.ccx_id << 2) | topo.core_id; >>>> - } else { >>>> - *ebx =3D (topo.node_id << 4) | (topo.ccx_id << 3) | topo.core= _id; >>>> - } >>>> + *ebx =3D ((topo_info->threads_per_core - 1) << 8) | (topo_ids.nod= e_id << 3) | >>>> + (topo_ids.core_id); >>>> /* >>>> * CPUID_Fn8000001E_ECX >>>> * 31:11 Reserved >>>> @@ -510,9 +418,9 @@ static void encode_topo_cpuid8000001e(CPUState *cs= , X86CPU *cpu, >>>> * 2 Socket id >>>> * 1:0 Node id >>>> */ >>>> - if (topo.num_nodes <=3D 4) { >>>> - *ecx =3D ((topo.num_nodes - 1) << 8) | (cpu->socket_id << 2) = | >>>> - topo.node_id; >>>> + >>>> + if (nodes <=3D 4) { >>>> + *ecx =3D ((nodes - 1) << 8) | (topo_ids.pkg_id << 2) | topo_i= ds.node_id; >>>> } else { >>>> /* >>>> * Node id fix up. Actual hardware supports up to 4 nodes. Bu= t with >>>> @@ -527,10 +435,10 @@ static void encode_topo_cpuid8000001e(CPUState *= cs, X86CPU *cpu, >>>> * number of nodes. find_last_bit returns last set bit(0 base= d). Left >>>> * shift(+1) the socket id to represent all the nodes. >>>> */ >>>> - nodes =3D topo.num_nodes - 1; >>>> + nodes -=3D 1; >>>> shift =3D find_last_bit(&nodes, 8); >>>> - *ecx =3D ((topo.num_nodes - 1) << 8) | (cpu->socket_id << (sh= ift + 1)) | >>>> - topo.node_id; >>>> + *ecx =3D (nodes << 8) | (topo_ids.pkg_id << (shift + 1)) | >>>> + topo_ids.node_id; >>>> } >>>> *edx =3D 0; >>>> } >>>> @@ -5318,6 +5226,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t in= dex, uint32_t count, >>>> uint32_t signature[3]; >>>> X86CPUTopoInfo topo_info; >>>> =20 >>>> + topo_info.nodes_per_pkg =3D env->nr_nodes; >>>> topo_info.dies_per_pkg =3D env->nr_dies; >>>> topo_info.cores_per_die =3D cs->nr_cores; >>>> topo_info.threads_per_core =3D cs->nr_threads; >>>> @@ -5737,20 +5646,20 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t = index, uint32_t count, >>>> } >>>> switch (count) { >>>> case 0: /* L1 dcache info */ >>>> - encode_cache_cpuid8000001d(env->cache_info_amd.l1d_cache,= cs, >>>> - eax, ebx, ecx, edx); >>>> + encode_cache_cpuid8000001d(env->cache_info_amd.l1d_cache, >>>> + &topo_info, eax, ebx, ecx, edx= ); >>>> break; >>>> case 1: /* L1 icache info */ >>>> - encode_cache_cpuid8000001d(env->cache_info_amd.l1i_cache,= cs, >>>> - eax, ebx, ecx, edx); >>>> + encode_cache_cpuid8000001d(env->cache_info_amd.l1i_cache, >>>> + &topo_info, eax, ebx, ecx, edx= ); >>>> break; >>>> case 2: /* L2 cache info */ >>>> - encode_cache_cpuid8000001d(env->cache_info_amd.l2_cache, = cs, >>>> - eax, ebx, ecx, edx); >>>> + encode_cache_cpuid8000001d(env->cache_info_amd.l2_cache, >>>> + &topo_info, eax, ebx, ecx, edx= ); >>>> break; >>>> case 3: /* L3 cache info */ >>>> - encode_cache_cpuid8000001d(env->cache_info_amd.l3_cache, = cs, >>>> - eax, ebx, ecx, edx); >>>> + encode_cache_cpuid8000001d(env->cache_info_amd.l3_cache, >>>> + &topo_info, eax, ebx, ecx, edx= ); >>>> break; >>>> default: /* end of info */ >>>> *eax =3D *ebx =3D *ecx =3D *edx =3D 0; >>>> @@ -5759,8 +5668,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t in= dex, uint32_t count, >>>> break; >>>> case 0x8000001E: >>>> assert(cpu->core_id <=3D 255); >>>> - encode_topo_cpuid8000001e(cs, cpu, >>>> - eax, ebx, ecx, edx); >>>> + encode_topo_cpuid8000001e(&topo_info, cpu, eax, ebx, ecx, edx= ); >>>> break; >>>> case 0xC0000000: >>>> *eax =3D env->cpuid_xlevel2; >>>> =20 >>> =20 >> >=20