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X-Received-From: 2607:f8b0:4864:20::541 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 9/27/19 3:23 AM, David Hildenbrand wrote: >> + pc = env->psw.addr; >> + if (!(flags & FLAG_MASK_64)) { >> + pc &= 0x7fffffff; >> + } > > If you're fancy, you could also add 24-bit addressing mode wrapping. > > Maybe unlikely(!(flags & FLAG_MASK_64)), but not sure how big the gain > will actually be. So, it appears that this patch, and the existing code in s390x_tr_init_disas_context, are wrong. Page 4-7 of the v11 PoO says that we must generate a specification exception and not wrap. I believe that the only way to force this to happen is with an explicit LOAD PSW EXTENDED instruction. Branches and sequential instruction execution both wrap the addresses before writing back to the PSW. I will drop this patch for now and we'll look again at instruction address later. r~