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From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: "Víctor Colombo" <victor.colombo@eldorado.org.br>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: clg@kaod.org, david@gibson.dropbear.id.au, groug@kaod.org,
	richard.henderson@linaro.org, matheus.ferst@eldorado.org.br,
	lucas.araujo@eldorado.org.br, leandro.lupori@eldorado.org.br,
	lucas.coutinho@eldorado.org.br
Subject: Re: [PATCH 03/19] target/ppc: Zero second doubleword in DFP instructions
Date: Mon, 5 Sep 2022 15:19:04 -0300	[thread overview]
Message-ID: <ade46e06-38ce-82c9-028e-c19ae0290441@gmail.com> (raw)
In-Reply-To: <20220901131756.26060-4-victor.colombo@eldorado.org.br>



On 9/1/22 10:17, Víctor Colombo wrote:
> Starting at PowerISA v3.1, the second doubleword of the registers
> used to store results in DFP instructions are supposed to be zeroed.
> 
>  From the ISA, chapter 7.2.1.1 Floating-Point Registers:
> """
> Chapter 4. Floating-Point Facility provides 32 64-bit
> FPRs. Chapter 5. Decimal Floating-Point also employs
> FPRs in decimal floating-point (DFP) operations. When
> VSX is implemented, the 32 FPRs are mapped to
> doubleword 0 of VSRs 0-31. (...)
> All instructions that operate on an FPR are redefined
> to operate on doubleword element 0 of the
> corresponding VSR. (...)
> and the contents of doubleword element 1 of the
> VSR corresponding to the target FPR or FPR pair for these
> instructions are set to 0.
> """
> 
> Before, the result stored at doubleword 1 was said to be undefined.
> 
> With that, this patch changes the DFP facility to zero doubleword 1
> when using set_dfp64 and set_dfp128. This fixes the behavior for ISA
> 3.1 while keeping the behavior correct for previous ones.
> 
> Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
> ---

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>

>   target/ppc/dfp_helper.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/target/ppc/dfp_helper.c b/target/ppc/dfp_helper.c
> index 5ba74b2124..be7aa5357a 100644
> --- a/target/ppc/dfp_helper.c
> +++ b/target/ppc/dfp_helper.c
> @@ -42,13 +42,16 @@ static void get_dfp128(ppc_vsr_t *dst, ppc_fprp_t *dfp)
>   
>   static void set_dfp64(ppc_fprp_t *dfp, ppc_vsr_t *src)
>   {
> -    dfp->VsrD(0) = src->VsrD(1);
> +    dfp[0].VsrD(0) = src->VsrD(1);
> +    dfp[0].VsrD(1) = 0ULL;
>   }
>   
>   static void set_dfp128(ppc_fprp_t *dfp, ppc_vsr_t *src)
>   {
>       dfp[0].VsrD(0) = src->VsrD(0);
>       dfp[1].VsrD(0) = src->VsrD(1);
> +    dfp[0].VsrD(1) = 0ULL;
> +    dfp[1].VsrD(1) = 0ULL;
>   }
>   
>   static void set_dfp128_to_avr(ppc_avr_t *dst, ppc_vsr_t *src)


  reply	other threads:[~2022-09-05 18:21 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-01 13:17 [PATCH 00/19] Multiple ppc instructions fixes Víctor Colombo
2022-09-01 13:17 ` [PATCH 01/19] target/ppc: Remove extra space from s128 field in ppc_vsr_t Víctor Colombo
2022-09-05 13:17   ` Daniel Henrique Barboza
2022-09-01 13:17 ` [PATCH 02/19] target/ppc: Remove unused xer_* macros Víctor Colombo
2022-09-05 13:58   ` Daniel Henrique Barboza
2022-09-01 13:17 ` [PATCH 03/19] target/ppc: Zero second doubleword in DFP instructions Víctor Colombo
2022-09-05 18:19   ` Daniel Henrique Barboza [this message]
2022-09-01 13:17 ` [PATCH 04/19] target/ppc: Set result to QNaN for DENBCD when VXCVI occurs Víctor Colombo
2022-09-05 18:21   ` Daniel Henrique Barboza
2022-09-01 13:17 ` [PATCH 05/19] target/ppc: Zero second doubleword for VSX madd instructions Víctor Colombo
2022-09-05 18:23   ` Daniel Henrique Barboza
2022-09-01 13:17 ` [PATCH 06/19] target/ppc: Set OV32 when OV is set Víctor Colombo
2022-09-05 18:25   ` Daniel Henrique Barboza
2022-09-01 13:17 ` [PATCH 07/19] target/ppc: Zero second doubleword of VSR registers for FPR insns Víctor Colombo
2022-09-05 18:26   ` Daniel Henrique Barboza
2022-09-01 13:17 ` [PATCH 08/19] target/ppc: Clear fpstatus flags on VSX_CVT_INT_TO_FP_VECTOR Víctor Colombo
2022-09-05 18:35   ` Daniel Henrique Barboza
2022-09-01 13:17 ` [PATCH 09/19] target/ppc: Clear fpstatus flags on VSX_CVT_INT_TO_FP Víctor Colombo
2022-09-01 13:17 ` [PATCH 10/19] target/ppc: Clear fpstatus flags on VSX_CVT_FP_TO_FP Víctor Colombo
2022-09-05 18:32   ` Daniel Henrique Barboza
2022-09-01 13:17 ` [PATCH 11/19] target/ppc: Clear fpstatus flags on VSX_CVT_FP_TO_INT_VECTOR Víctor Colombo
2022-09-01 13:17 ` [PATCH 12/19] target/ppc: Clear fpstatus flags on VSX_CVT_FP_TO_INT2 Víctor Colombo
2022-09-01 13:17 ` [PATCH 13/19] target/ppc: Clear fpstatus flags on VSX_CVT_FP_TO_INT Víctor Colombo
2022-09-01 13:17 ` [PATCH 14/19] target/ppc: Clear fpstatus flags on VSX_CVT_FP_TO_FP_HP Víctor Colombo
2022-09-01 13:17 ` [PATCH 15/19] target/ppc: Clear fpstatus flags on VSX_CVT_FP_TO_FP_VECTOR Víctor Colombo
2022-09-01 13:17 ` [PATCH 16/19] target/ppc: Clear fpstatus flags for xscvqpdp Víctor Colombo
2022-09-01 13:17 ` [PATCH 17/19] target/ppc: Clear fpstatus flags for xscvdpsp[n] Víctor Colombo
2022-09-01 13:17 ` [PATCH 18/19] target/ppc: Clear fpstatus flags on VSX_CMP Víctor Colombo
2022-09-05 18:41   ` Daniel Henrique Barboza
2022-09-05 18:58     ` Víctor Colombo
2022-09-01 13:17 ` [PATCH 19/19] target/ppc: Clear fpstatus flags on VSX_ROUND Víctor Colombo
2022-09-05 18:33   ` Daniel Henrique Barboza

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