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[187.189.51.143]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-3f5d4e81697sm1867224fac.8.2025.12.11.07.09.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 11 Dec 2025 07:09:21 -0800 (PST) Message-ID: Date: Thu, 11 Dec 2025 09:09:19 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/7] target/alpha: Introduce alpha_phys_addr_space_bits() To: Anton Johansson , qemu-devel@nongnu.org Cc: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= References: <20251209-phys_addr-v1-0-c387f3e72d77@rev.ng> <20251209-phys_addr-v1-1-c387f3e72d77@rev.ng> From: Richard Henderson Content-Language: en-US In-Reply-To: <20251209-phys_addr-v1-1-c387f3e72d77@rev.ng> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2001:4860:4864:20::2b; envelope-from=richard.henderson@linaro.org; helo=mail-oa1-x2b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 12/9/25 07:56, Anton Johansson wrote: > In preparation for dropping TARGET_PHYS_ADDR_SPACE_BITS, add a > a runtime function to correctly represent the size of the physical > address space for EV4-6 based on the current CPU version. > > Signed-off-by: Anton Johansson > --- > linux-user/alpha/target_proc.h | 2 +- > target/alpha/cpu.h | 1 + > target/alpha/helper.c | 18 ++++++++++++++++++ > 3 files changed, 20 insertions(+), 1 deletion(-) > > diff --git a/linux-user/alpha/target_proc.h b/linux-user/alpha/target_proc.h > index da437ee0e5..bcdd1e343c 100644 > --- a/linux-user/alpha/target_proc.h > +++ b/linux-user/alpha/target_proc.h > @@ -57,7 +57,7 @@ static int open_cpuinfo(CPUArchState *cpu_env, int fd) > "L1 Dcache\t\t: n/a\n" > "L2 cache\t\t: n/a\n" > "L3 cache\t\t: n/a\n", > - model, TARGET_PAGE_SIZE, TARGET_PHYS_ADDR_SPACE_BITS, > + model, TARGET_PAGE_SIZE, alpha_phys_addr_space_bits(cpu_env), > max_cpus, num_cpus, cpu_mask); > > return 0; > diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h > index 45944e46b5..9ee8d93b72 100644 > --- a/target/alpha/cpu.h > +++ b/target/alpha/cpu.h > @@ -286,6 +286,7 @@ bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req); > hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > #endif /* !CONFIG_USER_ONLY */ > void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags); > +uint8_t alpha_phys_addr_space_bits(CPUAlphaState *env); > int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > > diff --git a/target/alpha/helper.c b/target/alpha/helper.c > index a9af52a928..0f0cf73bf3 100644 > --- a/target/alpha/helper.c > +++ b/target/alpha/helper.c > @@ -523,6 +523,24 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags) > qemu_fprintf(f, "\n"); > } > > +uint8_t alpha_phys_addr_space_bits(CPUAlphaState *env) > +{ > + switch (env->implver) { > + case IMPLVER_2106x: > + /* EV4 */ > + return 34; > + case IMPLVER_21164: > + /* EV5 */ > + return 40; > + case IMPLVER_21264: > + case IMPLVER_21364: > + /* EV6 and EV7*/ > + return 44; > + default: > + g_assert_not_reached(); > + } > +} > + > /* This should only be called from translate, via gen_excp. > We expect that ENV->PC has already been updated. */ > G_NORETURN void helper_excp(CPUAlphaState *env, int excp, int error) > This could just as well be a static function within linux-user/alpha/target_proc.h. r~