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Thu, 2 Oct 2025 07:54:05 GMT Received: from smtprelay01.fra02v.mail.ibm.com ([9.218.2.227]) by ppma23.wdc07v.mail.ibm.com (PPS) with ESMTPS id 49eurk4xnr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 02 Oct 2025 07:54:05 +0000 Received: from smtpav07.fra02v.mail.ibm.com (smtpav07.fra02v.mail.ibm.com [10.20.54.106]) by smtprelay01.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 5927s1p159703586 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 2 Oct 2025 07:54:01 GMT Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 65BEB2004D; Thu, 2 Oct 2025 07:54:01 +0000 (GMT) Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2DB5720040; Thu, 2 Oct 2025 07:54:01 +0000 (GMT) Received: from [9.155.199.94] (unknown [9.155.199.94]) by smtpav07.fra02v.mail.ibm.com (Postfix) with ESMTP; Thu, 2 Oct 2025 07:54:01 +0000 (GMT) Message-ID: Date: Thu, 2 Oct 2025 09:54:01 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] s390x/pci: fix interrupt blocking by returning only the device's summary bit To: Jaehoon Kim , qemu-devel@nongnu.org, qemu-s390x@nongnu.org Cc: mjrosato@linux.ibm.com, farman@linux.ibm.com, pasic@linux.ibm.com, thuth@redhat.com, richard.henderson@linaro.org, david@redhat.com, iii@linux.ibm.com References: <20251001154004.71917-1-jhkim@linux.ibm.com> Content-Language: en-US From: Christian Borntraeger In-Reply-To: <20251001154004.71917-1-jhkim@linux.ibm.com> Content-Type: text/plain; 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envelope-from=borntraeger@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Am 01.10.25 um 17:39 schrieb Jaehoon Kim: > Previously, set_ind_atomic() returned the entire byte containing > multiple summary bits. This meant that if any other summary bit in the > byte was set, interrupt injection could be incorrectly blocked, even > when the current device's summary bit was not set. As a result, the > guest could remain blocked after I/O completion during FIO tests. > > This patch replaces set_ind_atomic() with set_ind_bit_atomic(), which > returns true if the bit was set by this function, and false if it was > already set or mapping failed. Interrupts are now blocked only when > the device's own summary bit was not previously set, avoiding > unintended blocking when multiple PCI summary bits exist within the > same byte. > > Signed-off-by: Jaehoon Kim [...] > -static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set) [...] Not changing the name would have made the patch smaller, but it is probably a better name name. Reviewed-by: Christian Borntraeger