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From: Richard Henderson <richard.henderson@linaro.org>
To: David Hildenbrand <david@redhat.com>,
	Thomas Huth <thuth@redhat.com>,
	qemu-devel@nongnu.org
Cc: Claudio Imbrenda <imbrenda@linux.ibm.com>,
	qemu-s390x@nongnu.org, Cornelia Huck <cohuck@redhat.com>,
	Janosch Frank <frankja@linux.ibm.com>
Subject: Re: [PATCH v4] target/s390x: Implement the MVPG condition-code-option bit
Date: Wed, 3 Mar 2021 13:05:02 -0800	[thread overview]
Message-ID: <ae902e23-08e4-303f-3eee-9e196987aeea@linaro.org> (raw)
In-Reply-To: <c938bfb6-7322-1738-8492-972b83cb7c99@redhat.com>

On 3/3/21 11:39 AM, David Hildenbrand wrote:
> Should we start wrapping that stuff into #ifdef CONFIG_TCG ?
> 
>> +    uint64_t tlb_fill_tec;   /* translation exception code during tlb_fill */
>> +    int tlb_fill_exc;        /* exception number seen during tlb_fill */

Eh, probably not.  At least not until we elide the softmmu tlb, which is 
fantastically larger.

>> +    if (unlikely(flags & TLB_INVALID_MASK)) {
>> +        return false;
> 
> ^ I recall PAGE_WRITE_INV handling where we immediately set TLB_INVALID_MASK 
> again on write access (to handle low-address protection cleanly). I suspect 
> that TLB_INVALID_MASK will be set in that case (I could be wrong, though).
> 
> What certainly would work is checking for "haddr != NULL".
> 
> /* Don't rely on TLB_INVALID_MASK - see PAGE_WRITE_INV handling. */
> if (unlikely(!haddr1)) {
>      return false;
> }

Ah, right.  I consider TLB_INVALID_MASK being set in the return from 
probe_access_flags for PAGE_WRITE_INV a bug.  I'm not sure how to fix that 
right away.

Well, !haddr1 is also false for TLB_MMIO, so you'd need to check for that as well.


r~


  reply	other threads:[~2021-03-03 21:06 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-03 13:28 [PATCH v4] target/s390x: Implement the MVPG condition-code-option bit Thomas Huth
2021-03-03 18:22 ` Richard Henderson
2021-03-03 19:39 ` David Hildenbrand
2021-03-03 21:05   ` Richard Henderson [this message]
2021-03-03 21:11     ` David Hildenbrand
2021-03-03 21:19       ` Richard Henderson
2021-03-03 21:22         ` David Hildenbrand
2021-03-03 21:36           ` Richard Henderson
2021-03-04  8:10             ` David Hildenbrand
2021-03-04  8:17               ` Cornelia Huck
2021-03-09 21:05               ` Thomas Huth
2021-03-10 20:49                 ` David Hildenbrand
2021-03-11 10:21                   ` Cornelia Huck
2021-03-11 14:03 ` David Hildenbrand
2021-03-11 15:58   ` Richard Henderson
2021-03-11 16:00     ` David Hildenbrand

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