diff -urN qemu-mmap_20041217/configure qemu-mmap_20041217-ppc/configure
--- qemu-mmap_20041217/configure	2004-12-19 00:01:12.000000000 +0100
+++ qemu-mmap_20041217-ppc/configure	2004-12-19 00:20:59.000000000 +0100
@@ -547,6 +547,10 @@
   echo "CONFIG_MMU_MAP=yes" >> $config_mak
   echo "#define CONFIG_MMU_MAP 1" >> $config_h
 fi
+if test "$target_softmmu" = "yes" -a "$target_cpu" = "i386" -a "$cpu" = "powerpc" ; then
+  echo "CONFIG_MMU_MAP=yes" >> $config_mak
+  echo "#define CONFIG_MMU_MAP 1" >> $config_h
+fi
 if test "$target_user_only" = "yes" ; then
   echo "CONFIG_USER_ONLY=yes" >> $config_mak
   echo "#define CONFIG_USER_ONLY 1" >> $config_h
diff -urN qemu-mmap_20041217/mmu_map.h qemu-mmap_20041217-ppc/mmu_map.h
--- qemu-mmap_20041217/mmu_map.h	2004-12-19 00:01:12.000000000 +0100
+++ qemu-mmap_20041217-ppc/mmu_map.h	2004-12-20 12:54:38.000000000 +0100
@@ -132,5 +132,44 @@
 }
 
 #else
+#if defined(__powerpc__)
+
+#ifdef linux
+#define R3 uc->uc_mcontext.regs->gpr[3]
+#endif
+
+#ifdef __APPLE__
+#include <sys/ucontext.h>
+#define R3 uc->uc_mcontext->ss.r3
+#endif
+
+#ifndef R3
+#error unsupported host operating system
+#endif
+
+static inline target_ulong mmu_map_fault_get_vaddr(ucontext_t *uc,
+                                                   unsigned long addr)
+{
+    target_ulong vaddr;
+
+    vaddr = addr - R3;
+    return vaddr;
+}
+
+static inline void mmu_map_fault_update_uc(ucontext_t *uc, MmuMap *map,
+                                           unsigned long vaddr, int is_write)
+{
+    target_ulong vpage;
+
+    vpage = vaddr >> TARGET_PAGE_BITS;
+    if (is_write) {
+        R3 = map->add_write[vpage];
+    } else {
+        R3 = map->add_read[vpage];
+    }
+}
+
+#else
 #error unsupported host CPU
 #endif
+#endif
diff -urN qemu-mmap_20041217/mmu_map_templ.h qemu-mmap_20041217-ppc/mmu_map_templ.h
--- qemu-mmap_20041217/mmu_map_templ.h	2004-12-19 00:01:12.000000000 +0100
+++ qemu-mmap_20041217-ppc/mmu_map_templ.h	2004-12-20 18:23:40.000000000 +0100
@@ -125,9 +125,145 @@
 }
 
 #else
-#error unsupported host CPU
+#if defined(__powerpc__)
+
+/* this code assumes that the host ppc is running in big endian mode */
+
+#ifdef TARGET_I386
+#define ENDIAN_SWAP
+#endif
+
+#if 0
+        /* slow lookup, first shift right, then left */
+        "rlwinm 3, %1, 32 - %2, %2, 31\n"
+        "addis  4, %3, %4@ha\n"
+        "rlwinm 3, 3, 2, 0, 31 - 2\n"
+        "addi   4, 4, %4@l\n"
+        "lwzx   3, 4, 3\n"
+
+        /* current lookup, one shift and mask operation */
+        "addis  4, %3, %4@ha\n"
+        "rlwinm 3, %1, 32 - (%2 - 2), (%2 - 2), 31 - 2\n"
+        "addi   4, 4, %4@l\n"
+        "lwzx   3, 4, 3\n"
+
+        /* better lookup, one shift and mask operation, mmu_map in register */
+        "rlwinm 3, %1, 32 - (%2 - 2), (%2 - 2), 31 - 2\n"
+        "lwzx   3, %3, 3\n"
+#endif
+
+static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(void *ptr)
+{
+    RES_TYPE val;
+
+    asm volatile (
+        "addis  4, %3, %4@ha\n"
+        "rlwinm 3, %1, 32 - (%2 - 2), (%2 - 2), 31 - 2\n"
+        "addi   4, 4, %4@l\n"
+        "lwzx   3, 4, 3\n"
+
+#if DATA_SIZE == 1
+        "lbzx   %0, %1, 3\n"
+#elif DATA_SIZE == 2
+#ifdef ENDIAN_SWAP
+        "lhbrx  %0, %1, 3\n"
+#else
+        "lhzx   %0, %1, 3\n"
+#endif
+#elif DATA_SIZE == 4
+#ifdef ENDIAN_SWAP
+        "lwbrx  %0, %1, 3\n"
+#else
+        "lwzx   %0, %1, 3\n"
 #endif
+#else
+#error unsupported size
+#endif
+        : "=r" (val)
+        : "r" (ptr),
+          "I" (TARGET_PAGE_BITS),
+          "r" (env),
+          "i" (offsetof(CPUState, mmu_map[CPU_MEM_INDEX].add_read))
+        : "%r3", "%r4", "memory");
 
+    return val;
+}
+
+#if DATA_SIZE <= 2
+static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(void *ptr)
+{
+    int val;
+
+    asm volatile (
+        "addis  4, %3, %4@ha\n"
+        "rlwinm 3, %1, 32 - (%2 - 2), (%2 - 2), 31 - 2\n"
+        "addi   4, 4, %4@l\n"
+        "lwzx   3, 4, 3\n"
+
+#if DATA_SIZE == 1
+        "lbzx   4, %1, 3\n"
+        "extsb  %0, 4\n"
+#elif DATA_SIZE == 2
+#ifdef ENDIAN_SWAP
+        "lhbrx   4, %1, 3\n"
+        "extsh  %0, 4\n"
+#else
+        "lhax   %0, %1, 3\n"
+#endif
+#else
+#error unsupported size
+#endif
+        : "=r" (val)
+        : "r" (ptr),
+          "I" (TARGET_PAGE_BITS),
+          "r" (env),
+          "i" (offsetof(CPUState, mmu_map[CPU_MEM_INDEX].add_read))
+        : "%r3", "%r4", "memory");
+
+    return val;
+}
+#endif
+
+static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(void *ptr, RES_TYPE val)
+{
+
+    asm volatile (
+        "addis  4, %3, %4@ha\n"
+        "rlwinm 3, %1, 32 - (%2 - 2), (%2 - 2), 31 - 2\n"
+        "addi   4, 4, %4@l\n"
+        "lwzx   3, 4, 3\n"
+
+#if DATA_SIZE == 1
+        "stbx   %0, %1, 3\n"
+#elif DATA_SIZE == 2
+#ifdef ENDIAN_SWAP
+        "sthbrx %0, %1, 3\n"
+#else
+        "sthx   %0, %1, 3\n"
+#endif
+#elif DATA_SIZE == 4
+#ifdef ENDIAN_SWAP
+        "stwbrx %0, %1, 3\n"
+#else
+        "stwx   %0, %1, 3\n"
+#endif
+#else
+#error unsupported size
+#endif
+        :
+        : "r" (val),
+          "r" (ptr),
+          "I" (TARGET_PAGE_BITS),
+          "r" (env),
+          "i" (offsetof(CPUState, mmu_map[CPU_MEM_INDEX].add_write))
+        : "%r3", "%r4", "memory");
+
+}
+
+#else
+#error unsupported host CPU
+#endif
+#endif
 
 #undef RES_TYPE
 #undef DATA_TYPE
