From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1IxfXY-0000wB-OL for qemu-devel@nongnu.org; Thu, 29 Nov 2007 04:18:36 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1IxfXV-0000u8-UZ for qemu-devel@nongnu.org; Thu, 29 Nov 2007 04:18:36 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1IxfXV-0000u5-NO for qemu-devel@nongnu.org; Thu, 29 Nov 2007 04:18:33 -0500 Received: from rn-out-0910.google.com ([64.233.170.186] helo=rn-out-0102.google.com) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1IxfXV-0003iZ-Eq for qemu-devel@nongnu.org; Thu, 29 Nov 2007 04:18:33 -0500 Received: by rn-out-0102.google.com with SMTP id i19so1486901rng for ; Thu, 29 Nov 2007 01:18:33 -0800 (PST) Message-ID: Date: Thu, 29 Nov 2007 18:18:32 +0900 From: "Magnus Damm" Subject: Re: [Qemu-devel] [PATCH]: sh4 delay slot code update In-Reply-To: <20071129055534.GA27339@linux-sh.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20071128124917.GA29926@linux-sh.org> <20071129055534.GA27339@linux-sh.org> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Nov 29, 2007 2:55 PM, Paul Mundt wrote: > The only thing to be careful of is the ordering semantics for the T-bit > state, which is what I tried to convey in the code snippet. > > > > You can see an example in arch/sh/kernel/entry-common.S: > > > > > > syscall_exit_work: > > > ! r0: current_thread_info->flags > > > ! r8: current_thread_info > > > tst #_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | _TIF_SYSCALL_AUDIT, r0 > > > bt/s work_pending > > > tst #_TIF_NEED_RESCHED, r0 > > > > > > .... > > > work_pending: > > > ! r0: current_thread_info->flags > > > ! r8: current_thread_info > > > ! t: result of "tst #_TIF_NEED_RESCHED, r0" > > > bf/s work_resched > > > tst #(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), r0 > > > > So while bt/s is conditional on the first flag test, the T-state is > relative to the second test by the time the branch happens. Exactly. > The T-state check for bt/bf happens _prior_ to execution of the delay > slot instruction, while any delay-slot resident T-bit modifier is > executed by the time we enter the branch. I don't know if your code > handles that or not, but figured it's probably good to make that > explicit. T-bit modifiers are always a bit hairy.. Yeah, the T flag is indeed a bit hairy. The patch should handle the T bit exactly as you describe it. As part of the bt/bf instruction the T flag is evaluated and if true the the DELAY_SLOT_TRUE bit is set. This bit is later used to decide if we should jump or not after the delay slot instruction. Thank you, / magnus