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* [PATCH 0/9] RISC-V CPU time source interface
@ 2025-11-07 10:23 Luc Michel
  2025-11-07 10:23 ` [PATCH 1/9] target/riscv: drop unused include directive in time_helper.c Luc Michel
                   ` (9 more replies)
  0 siblings, 10 replies; 21+ messages in thread
From: Luc Michel @ 2025-11-07 10:23 UTC (permalink / raw)
  To: qemu-devel, qemu-riscv
  Cc: Luc Michel, Palmer Dabbelt, Alistair Francis, Weiwei Li,
	Daniel Henrique Barboza, Liu Zhiwei, Francisco Iglesias

Hello,

By working locally on a RISC-V CPU with the sstc extension, I noticed
that the sstc code (the `riscv_timer_write_timecmp' function) was
implicitly assuming that the object behind the env->rdtime_fn callback
was a ACLINT. This is not a correct assumption from the point of view of
the riscv_cpu_set_rdtime_fn function API since env->rdtime_fn_arg is a
`void *' and is not required to be a ACLINT.

I reworked this and ended up with this series. It introduces the
RISCVCPUTimeSrcIf interface to replace the env->rdtime_fn callback and
break this dependency. This interface provides a mean to retrieve the
number of ticks (same as the rdtime_fn callback), and the tick frequency
that `riscv_timer_write_timecmp' needs.

This will effectively allow other platforms with CPUs and the sstc
extension but no ACLINT to provide their own time source. For now only
the ACLINT implements this interface.

The last two patches enhance the interface with a tick change notifier
registering mechanism. This allows the time source user (the CPU) to get
notified when the time source tick counter gets asynchronously modified
(reset to 0, ...), i.e., when the time register is written to. This is
then implemented in the ACLINT so that it does not have to include
time_helper.h and tinker with the CPU internals. This again will allow
new sources to be implemented more easily. It also ease maintenance by
keeping internal CPU mechanics contained into the RISC-V target code and
avoid potential duplication.

Note that I would have liked to put the time_src interface as a qdev
link property on the CPU but given the current state of the various
RISC-V machines, this is not easy to do. Most of the time the CPU gets
realized before the ACLINT so it is too late to set the link property.
This would require further refactoring.

Tested using `make check' and by booting Linux v6.17.6 in the virt
machine with 4 CPUs. I can see an initial `time' register write
(probably initial reset or OpenSBI) that correctly notifies the CPUs.

Thanks

Luc

Luc Michel (9):
  target/riscv: drop unused include directive in time_helper.c
  hw/intc/riscv_aclint: fix coding style
  hw/intc/riscv_aclint: rename cpu_riscv_read_rtc to
    riscv_aclint_mtimer_get_ticks
  target/riscv: add the RISCVCPUTimeSrcIf interface
  hw/intc/riscv_aclint: implement the RISCVCPUTimeSrcIf interface
  target/riscv: replace env->rdtime_fn with a time source
  hw/intc/riscv_aclint: riscv_aclint_mtimer_get_ticks: get rid of void*
    argument
  target/riscv: RISCVCPUTimeSrcIf: add register_time_change_notifier
  hw/intc/riscv_aclint: implement the register_time_change_notifier
    method

 include/hw/intc/riscv_aclint.h |  1 +
 target/riscv/cpu-qom.h         | 41 ++++++++++++++++++
 target/riscv/cpu.h             |  9 ++--
 target/riscv/time_helper.h     | 27 ++++++++++++
 hw/intc/riscv_aclint.c         | 76 ++++++++++++++++++++++++----------
 target/riscv/cpu_helper.c      |  7 ----
 target/riscv/csr.c             | 24 +++++------
 target/riscv/time_helper.c     | 42 +++++++++++++++----
 8 files changed, 173 insertions(+), 54 deletions(-)

-- 
2.51.0



^ permalink raw reply	[flat|nested] 21+ messages in thread
end of thread, other threads:[~2025-11-20 17:23 UTC | newest]

Thread overview: 21+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-11-07 10:23 [PATCH 0/9] RISC-V CPU time source interface Luc Michel
2025-11-07 10:23 ` [PATCH 1/9] target/riscv: drop unused include directive in time_helper.c Luc Michel
2025-11-09 14:03   ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 2/9] hw/intc/riscv_aclint: fix coding style Luc Michel
2025-11-09 13:56   ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 3/9] hw/intc/riscv_aclint: rename cpu_riscv_read_rtc to riscv_aclint_mtimer_get_ticks Luc Michel
2025-11-09 13:56   ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 4/9] target/riscv: add the RISCVCPUTimeSrcIf interface Luc Michel
2025-11-09 14:02   ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 5/9] hw/intc/riscv_aclint: implement " Luc Michel
2025-11-09 14:01   ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 6/9] target/riscv: replace env->rdtime_fn with a time source Luc Michel
2025-11-09 13:59   ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 7/9] hw/intc/riscv_aclint: riscv_aclint_mtimer_get_ticks: get rid of void* argument Luc Michel
2025-11-09 13:59   ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 8/9] target/riscv: RISCVCPUTimeSrcIf: add register_time_change_notifier Luc Michel
2025-11-20 17:20   ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 9/9] hw/intc/riscv_aclint: implement the register_time_change_notifier method Luc Michel
2025-11-20 17:22   ` Philippe Mathieu-Daudé
2025-11-14  9:25 ` [PATCH 0/9] RISC-V CPU time source interface Luc Michel
2025-11-20 17:16   ` Philippe Mathieu-Daudé

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